drm/amd/display: add support for low bpc

[WHY&HOW]
Low bpc timings are failing validation, port a patch to allow them to pass.

Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 61cc490..cad2bc3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -1595,7 +1595,6 @@ double dml32_TruncToValidBPP(
        unsigned int   NonDSCBPP0;
        unsigned int   NonDSCBPP1;
        unsigned int   NonDSCBPP2;
-       unsigned int   NonDSCBPP3;
 
        if (Format == dm_420) {
                NonDSCBPP0 = 12;
@@ -1604,10 +1603,9 @@ double dml32_TruncToValidBPP(
                MinDSCBPP = 6;
                MaxDSCBPP = 1.5 * DSCInputBitPerComponent - 1 / 16;
        } else if (Format == dm_444) {
-               NonDSCBPP0 = 18;
-               NonDSCBPP1 = 24;
-               NonDSCBPP2 = 30;
-               NonDSCBPP3 = 36;
+               NonDSCBPP0 = 24;
+               NonDSCBPP1 = 30;
+               NonDSCBPP2 = 36;
                MinDSCBPP = 8;
                MaxDSCBPP = 3 * DSCInputBitPerComponent - 1.0 / 16;
        } else {
@@ -1661,9 +1659,7 @@ double dml32_TruncToValidBPP(
                        else
                                return dml_floor(16.0 * MaxLinkBPP, 1.0) / 16.0;
                } else {
-                       if (MaxLinkBPP >= NonDSCBPP3)
-                               return NonDSCBPP3;
-                       else if (MaxLinkBPP >= NonDSCBPP2)
+                       if (MaxLinkBPP >= NonDSCBPP2)
                                return NonDSCBPP2;
                        else if (MaxLinkBPP >= NonDSCBPP1)
                                return NonDSCBPP1;
@@ -1674,7 +1670,7 @@ double dml32_TruncToValidBPP(
                }
        } else {
                if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 ||
-                               DesiredBPP == NonDSCBPP0 || DesiredBPP == NonDSCBPP3)) ||
+                               DesiredBPP <= NonDSCBPP0)) ||
                                (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP)))
                        return BPP_INVALID;
                else