arm64/sysreg: Rename TRBLIMITR_EL1 fields per auto-gen tools format

This renames TRBLIMITR_EL1 register fields per auto-gen tools format
without causing any functional change in the TRBE driver.

Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: kvmarm@lists.linux.dev
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230614065949.146187-2-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 23a17da..d930400 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -238,14 +238,14 @@
 #define SYS_TRBTRG_EL1                 sys_reg(3, 0, 9, 11, 6)
 #define SYS_TRBIDR_EL1                 sys_reg(3, 0, 9, 11, 7)
 
-#define TRBLIMITR_LIMIT_MASK           GENMASK_ULL(51, 0)
-#define TRBLIMITR_LIMIT_SHIFT          12
-#define TRBLIMITR_NVM                  BIT(5)
-#define TRBLIMITR_TRIG_MODE_MASK       GENMASK(1, 0)
-#define TRBLIMITR_TRIG_MODE_SHIFT      3
-#define TRBLIMITR_FILL_MODE_MASK       GENMASK(1, 0)
-#define TRBLIMITR_FILL_MODE_SHIFT      1
-#define TRBLIMITR_ENABLE               BIT(0)
+#define TRBLIMITR_EL1_LIMIT_MASK       GENMASK_ULL(63, 12)
+#define TRBLIMITR_EL1_LIMIT_SHIFT      12
+#define TRBLIMITR_EL1_nVM              BIT(5)
+#define TRBLIMITR_EL1_TM_MASK          GENMASK(4, 3)
+#define TRBLIMITR_EL1_TM_SHIFT         3
+#define TRBLIMITR_EL1_FM_MASK          GENMASK(2, 1)
+#define TRBLIMITR_EL1_FM_SHIFT         1
+#define TRBLIMITR_EL1_E                        BIT(0)
 #define TRBPTR_PTR_MASK                        GENMASK_ULL(63, 0)
 #define TRBPTR_PTR_SHIFT               0
 #define TRBBASER_BASE_MASK             GENMASK_ULL(51, 0)

diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
index d756b93..4558c02 100644 (file)
--- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c
+++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
@@ -56,7 +56,7 @@ static void __debug_save_trace(u64 *trfcr_el1)
        *trfcr_el1 = 0;
 
        /* Check if the TRBE is enabled */
-       if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_ENABLE))
+       if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E))
                return;
        /*
         * Prohibit trace generation while we are in guest.

diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
index 1fc4fd7..1d9d141 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-trbe.c
+++ b/drivers/hwtracing/coresight/coresight-trbe.c
@@ -218,7 +218,7 @@ static inline void set_trbe_enabled(struct trbe_cpudata *cpudata, u64 trblimitr)
         * Enable the TRBE without clearing LIMITPTR which
         * might be required for fetching the buffer limits.
         */
-       trblimitr |= TRBLIMITR_ENABLE;
+       trblimitr |= TRBLIMITR_EL1_E;
        write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1);
 
        /* Synchronize the TRBE enable event */
@@ -236,7 +236,7 @@ static inline void set_trbe_disabled(struct trbe_cpudata *cpudata)
         * Disable the TRBE without clearing LIMITPTR which
         * might be required for fetching the buffer limits.
         */
-       trblimitr &= ~TRBLIMITR_ENABLE;
+       trblimitr &= ~TRBLIMITR_EL1_E;
        write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1);
 
        if (trbe_needs_drain_after_disable(cpudata))
@@ -596,13 +596,13 @@ static void set_trbe_limit_pointer_enabled(struct trbe_buf *buf)
        u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
        unsigned long addr = buf->trbe_limit;
 
-       WARN_ON(!IS_ALIGNED(addr, (1UL << TRBLIMITR_LIMIT_SHIFT)));
+       WARN_ON(!IS_ALIGNED(addr, (1UL << TRBLIMITR_EL1_LIMIT_SHIFT)));
        WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE));
 
-       trblimitr &= ~TRBLIMITR_NVM;
-       trblimitr &= ~(TRBLIMITR_FILL_MODE_MASK << TRBLIMITR_FILL_MODE_SHIFT);
-       trblimitr &= ~(TRBLIMITR_TRIG_MODE_MASK << TRBLIMITR_TRIG_MODE_SHIFT);
-       trblimitr &= ~(TRBLIMITR_LIMIT_MASK << TRBLIMITR_LIMIT_SHIFT);
+       trblimitr &= ~TRBLIMITR_EL1_nVM;
+       trblimitr &= ~TRBLIMITR_EL1_FM_MASK;
+       trblimitr &= ~TRBLIMITR_EL1_TM_MASK;
+       trblimitr &= ~TRBLIMITR_EL1_LIMIT_MASK;
 
        /*
         * Fill trace buffer mode is used here while configuring the
@@ -613,14 +613,15 @@ static void set_trbe_limit_pointer_enabled(struct trbe_buf *buf)
         * trace data in the interrupt handler, before reconfiguring
         * the TRBE.
         */
-       trblimitr |= (TRBE_FILL_MODE_FILL & TRBLIMITR_FILL_MODE_MASK) << TRBLIMITR_FILL_MODE_SHIFT;
+       trblimitr |= (TRBLIMITR_EL1_FM_FILL << TRBLIMITR_EL1_FM_SHIFT) &
+                    TRBLIMITR_EL1_FM_MASK;
 
        /*
         * Trigger mode is not used here while configuring the TRBE for
         * the trace capture. Hence just keep this in the ignore mode.
         */
-       trblimitr |= (TRBE_TRIG_MODE_IGNORE & TRBLIMITR_TRIG_MODE_MASK) <<
-                     TRBLIMITR_TRIG_MODE_SHIFT;
+       trblimitr |= (TRBLIMITR_EL1_TM_IGNR << TRBLIMITR_EL1_TM_SHIFT) &
+                    TRBLIMITR_EL1_TM_MASK;
        trblimitr |= (addr & PAGE_MASK);
        set_trbe_enabled(buf->cpudata, trblimitr);
 }

diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h
index 98ff1b1..8ea7079 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-trbe.h
+++ b/drivers/hwtracing/coresight/coresight-trbe.h
@@ -30,7 +30,7 @@ static inline bool is_trbe_enabled(void)
 {
        u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
 
-       return trblimitr & TRBLIMITR_ENABLE;
+       return trblimitr & TRBLIMITR_EL1_E;
 }
 
 #define TRBE_EC_OTHERS         0
@@ -86,8 +86,9 @@ static inline bool is_trbe_running(u64 trbsr)
 
 #define TRBE_TRIG_MODE_STOP            0
 #define TRBE_TRIG_MODE_IRQ             1
-#define TRBE_TRIG_MODE_IGNORE          3
+#define TRBLIMITR_EL1_TM_IGNR          3
 
+#define TRBLIMITR_EL1_FM_FILL          0
 #define TRBE_FILL_MODE_FILL            0
 #define TRBE_FILL_MODE_WRAP            1
 #define TRBE_FILL_MODE_CIRCULAR_BUFFER 3
@@ -121,7 +122,7 @@ static inline void set_trbe_write_pointer(unsigned long addr)
 static inline unsigned long get_trbe_limit_pointer(void)
 {
        u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
-       unsigned long addr = trblimitr & (TRBLIMITR_LIMIT_MASK << TRBLIMITR_LIMIT_SHIFT);
+       unsigned long addr = trblimitr & TRBLIMITR_EL1_LIMIT_MASK;
 
        WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE));
        return addr;