NTB: move ntb_ctrl handling to init and deinit

It does not really make sense to enable or disable
the bits of NTB_CTRL register only during enable
and disable link callbacks. They should be done
independent of these callbacks. The correct placement
for that is during the amd_init_side_info() and
amd_deinit_side_info() functions, which are invoked
during probe and remove respectively.

Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>

diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c
index a1c4a21..621a69a 100644 (file)
--- a/drivers/ntb/hw/amd/ntb_hw_amd.c
+++ b/drivers/ntb/hw/amd/ntb_hw_amd.c
@@ -290,7 +290,6 @@ static int amd_ntb_link_enable(struct ntb_dev *ntb,
 {
        struct amd_ntb_dev *ndev = ntb_ndev(ntb);
        void __iomem *mmio = ndev->self_mmio;
-       u32 ntb_ctl;
 
        /* Enable event interrupt */
        ndev->int_mask &= ~AMD_EVENT_INTMASK;
@@ -300,10 +299,6 @@ static int amd_ntb_link_enable(struct ntb_dev *ntb,
                return -EINVAL;
        dev_dbg(&ntb->pdev->dev, "Enabling Link.\n");
 
-       ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
-       ntb_ctl |= (PMM_REG_CTL | SMM_REG_CTL);
-       writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);
-
        return 0;
 }
 
@@ -311,7 +306,6 @@ static int amd_ntb_link_disable(struct ntb_dev *ntb)
 {
        struct amd_ntb_dev *ndev = ntb_ndev(ntb);
        void __iomem *mmio = ndev->self_mmio;
-       u32 ntb_ctl;
 
        /* Disable event interrupt */
        ndev->int_mask |= AMD_EVENT_INTMASK;
@@ -321,10 +315,6 @@ static int amd_ntb_link_disable(struct ntb_dev *ntb)
                return -EINVAL;
        dev_dbg(&ntb->pdev->dev, "Enabling Link.\n");
 
-       ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
-       ntb_ctl &= ~(PMM_REG_CTL | SMM_REG_CTL);
-       writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);
-
        return 0;
 }
 
@@ -927,18 +917,24 @@ static void amd_init_side_info(struct amd_ntb_dev *ndev)
 {
        void __iomem *mmio = ndev->self_mmio;
        unsigned int reg;
+       u32 ntb_ctl;
 
        reg = readl(mmio + AMD_SIDEINFO_OFFSET);
        if (!(reg & AMD_SIDE_READY)) {
                reg |= AMD_SIDE_READY;
                writel(reg, mmio + AMD_SIDEINFO_OFFSET);
        }
+
+       ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
+       ntb_ctl |= (PMM_REG_CTL | SMM_REG_CTL);
+       writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);
 }
 
 static void amd_deinit_side_info(struct amd_ntb_dev *ndev)
 {
        void __iomem *mmio = ndev->self_mmio;
        unsigned int reg;
+       u32 ntb_ctl;
 
        reg = readl(mmio + AMD_SIDEINFO_OFFSET);
        if (reg & AMD_SIDE_READY) {
@@ -946,6 +942,10 @@ static void amd_deinit_side_info(struct amd_ntb_dev *ndev)
                writel(reg, mmio + AMD_SIDEINFO_OFFSET);
                readl(mmio + AMD_SIDEINFO_OFFSET);
        }
+
+       ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
+       ntb_ctl &= ~(PMM_REG_CTL | SMM_REG_CTL);
+       writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);
 }
 
 static int amd_init_ntb(struct amd_ntb_dev *ndev)