.max_width = 4096,
.max_height = 4096,
.routes = rcar_info_r8a7795_routes,
+ .scaler = rvin_scaler_gen3,
};
static const struct rvin_group_route rcar_info_r8a7795es1_routes[] = {
.max_width = 4096,
.max_height = 4096,
.routes = rcar_info_r8a7796_routes,
+ .scaler = rvin_scaler_gen3,
};
static const struct rvin_group_route rcar_info_r8a77965_routes[] = {
.max_width = 4096,
.max_height = 4096,
.routes = rcar_info_r8a77965_routes,
+ .scaler = rvin_scaler_gen3,
};
static const struct rvin_group_route rcar_info_r8a77970_routes[] = {
.max_width = 4096,
.max_height = 4096,
.routes = rcar_info_r8a77990_routes,
+ .scaler = rvin_scaler_gen3,
};
static const struct rvin_group_route rcar_info_r8a77995_routes[] = {
.max_width = 4096,
.max_height = 4096,
.routes = rcar_info_r8a77995_routes,
+ .scaler = rvin_scaler_gen3,
};
static const struct rvin_info rcar_info_r8a779a0 = {
ret = rvin_isp_init(vin);
} else if (vin->info->use_mc) {
ret = rvin_csi2_init(vin);
+
+ if (vin->info->scaler &&
+ rvin_group_id_to_master(vin->id) == vin->id)
+ vin->scaler = vin->info->scaler;
} else {
ret = rvin_parallel_init(vin);
/* Register offsets specific for Gen3 */
#define VNCSI_IFMD_REG 0x20 /* Video n CSI2 Interface Mode Register */
+#define VNUDS_CTRL_REG 0x80 /* Video n scaling control register */
+#define VNUDS_SCALE_REG 0x84 /* Video n scaling factor register */
+#define VNUDS_PASS_BWIDTH_REG 0x90 /* Video n passband register */
+#define VNUDS_CLIP_SIZE_REG 0xa4 /* Video n UDS output size clipping reg */
/* Register bit fields for R-Car VIN */
/* Video n Main Control Register bits */
#define VNCSI_IFMD_DES0 (1 << 25)
#define VNCSI_IFMD_CSI_CHSEL(n) (((n) & 0xf) << 0)
+/* Video n scaling control register (Gen3) */
+#define VNUDS_CTRL_AMD (1 << 30)
+
struct rvin_buffer {
struct vb2_v4l2_buffer vb;
struct list_head list;
0, 0);
}
+static unsigned int rvin_uds_scale_ratio(unsigned int in, unsigned int out)
+{
+ unsigned int ratio;
+
+ ratio = in * 4096 / out;
+ return ratio >= 0x10000 ? 0xffff : ratio;
+}
+
+static unsigned int rvin_uds_filter_width(unsigned int ratio)
+{
+ if (ratio >= 0x1000)
+ return 64 * (ratio & 0xf000) / ratio;
+
+ return 64;
+}
+
+void rvin_scaler_gen3(struct rvin_dev *vin)
+{
+ unsigned int ratio_h, ratio_v;
+ unsigned int bwidth_h, bwidth_v;
+ u32 vnmc, clip_size;
+
+ vnmc = rvin_read(vin, VNMC_REG);
+
+ /* Disable scaler if not needed. */
+ if (!rvin_scaler_needed(vin)) {
+ rvin_write(vin, vnmc & ~VNMC_SCLE, VNMC_REG);
+ return;
+ }
+
+ ratio_h = rvin_uds_scale_ratio(vin->crop.width, vin->compose.width);
+ bwidth_h = rvin_uds_filter_width(ratio_h);
+
+ ratio_v = rvin_uds_scale_ratio(vin->crop.height, vin->compose.height);
+ bwidth_v = rvin_uds_filter_width(ratio_v);
+
+ clip_size = vin->compose.width << 16;
+
+ switch (vin->format.field) {
+ case V4L2_FIELD_INTERLACED_TB:
+ case V4L2_FIELD_INTERLACED_BT:
+ case V4L2_FIELD_INTERLACED:
+ case V4L2_FIELD_SEQ_TB:
+ case V4L2_FIELD_SEQ_BT:
+ clip_size |= vin->compose.height / 2;
+ break;
+ default:
+ clip_size |= vin->compose.height;
+ break;
+ }
+
+ rvin_write(vin, vnmc | VNMC_SCLE, VNMC_REG);
+ rvin_write(vin, VNUDS_CTRL_AMD, VNUDS_CTRL_REG);
+ rvin_write(vin, (ratio_h << 16) | ratio_v, VNUDS_SCALE_REG);
+ rvin_write(vin, (bwidth_h << 16) | bwidth_v, VNUDS_PASS_BWIDTH_REG);
+ rvin_write(vin, clip_size, VNUDS_CLIP_SIZE_REG);
+
+ vin_dbg(vin, "Pre-Clip: %ux%u@%u:%u Post-Clip: %ux%u@%u:%u\n",
+ vin->crop.width, vin->crop.height, vin->crop.left,
+ vin->crop.top, vin->compose.width, vin->compose.height,
+ vin->compose.left, vin->compose.top);
+}
+
void rvin_crop_scale_comp(struct rvin_dev *vin)
{
const struct rvin_video_format *fmt;