arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
authorMichal Simek <michal.simek@xilinx.com>
Thu, 21 Jan 2021 10:26:51 +0000 (11:26 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 1 Feb 2021 09:36:09 +0000 (10:36 +0100)
Enable si5341 driver is the main chip for providing preprogrammed clocks
for the whole platform.

 # cat /sys/kernel/debug/clk/clk_summary
...
 refhdmi                              1        1        0   114285000          0     0  50000
    xtal_0                            0        0        0   114285000          0     0  50000
       pll_0                          0        0        0 40731174000000          0     0  50000
          clk1_0                      0        0        0    27000000          0     0  50000
          clk0_0                      0        0        0    27000000          0     0  50000
 ref48M                               1        2        0    48000000          0     0  50000
    si5341                            0        4        0    14000000          0     0  50000
       clock-generator.N4             0        0        0           0          0     0  50000
       clock-generator.N3             0        1        0   733260000          0     0  50000
          clock-generator.9           0        1        0    33330000          0     0  50000
       clock-generator.N2             0        1        0   104000000          0     0  50000
          clock-generator.2           0        1        0    26000000          0     0  50000
       clock-generator.N1             0        2        0   594000000          0     0  50000
          clock-generator.7           0        1        0    74250000          0     0  50000
          clock-generator.0           0        1        0    27000000          0     0  50000
       clock-generator.N0             0        4        0  1000000000          0     0  50000
          clock-generator.8           0        0        0           0          0     0  50000
          clock-generator.6           0        1        0   125000000          0     0  50000
          clock-generator.5           0        1        0   100000000          0     0  50000
          clock-generator.4           0        1        0   100000000          0     0  50000
          clock-generator.3           0        1        0   125000000          0     0  50000
          clock-generator.1           0        0        0           0          0     0  50000
...

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/b93f13297684704a60e8d7274009a20aa98d14f7.1611224800.git.michal.simek@xilinx.com
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts

index 5ff7ab6..68c2ad3 100644 (file)
                io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
        };
 
+       /* 48MHz reference crystal */
+       ref48: ref48M {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <48000000>;
+       };
+
        refhdmi: refhdmi {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                        #size-cells = <0>;
                        reg = <1>;
                        si5341: clock-generator@36 { /* SI5341 - u69 */
+                               compatible = "silabs,si5341";
                                reg = <0x36>;
-                       };
+                               #clock-cells = <2>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&ref48>;
+                               clock-names = "xtal";
+                               clock-output-names = "si5341";
 
+                               si5341_0: out@0 {
+                                       /* refclk0 for PS-GT, used for DP */
+                                       reg = <0>;
+                                       always-on;
+                               };
+                               si5341_2: out@2 {
+                                       /* refclk2 for PS-GT, used for USB3 */
+                                       reg = <2>;
+                                       always-on;
+                               };
+                               si5341_3: out@3 {
+                                       /* refclk3 for PS-GT, used for SATA */
+                                       reg = <3>;
+                                       always-on;
+                               };
+                               si5341_4: out@4 {
+                                       /* refclk4 for PS-GT, used for PCIE slot */
+                                       reg = <4>;
+                                       always-on;
+                               };
+                               si5341_5: out@5 {
+                                       /* refclk5 for PS-GT, used for PCIE */
+                                       reg = <5>;
+                                       always-on;
+                               };
+                               si5341_6: out@6 {
+                                       /* refclk6 PL CLK125 */
+                                       reg = <6>;
+                                       always-on;
+                               };
+                               si5341_7: out@7 {
+                                       /* refclk7 PL CLK74 */
+                                       reg = <7>;
+                                       always-on;
+                               };
+                               si5341_9: out@9 {
+                                       /* refclk9 used for PS_REF_CLK 33.3 MHz */
+                                       reg = <9>;
+                                       always-on;
+                               };
+                       };
                };
                i2c@2 {
                        #address-cells = <1>;
index 7910ac1..a29ff20 100644 (file)
                io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
        };
 
+       /* 48MHz reference crystal */
+       ref48: ref48M {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <48000000>;
+       };
+
        refhdmi: refhdmi {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                        #size-cells = <0>;
                        reg = <1>;
                        si5341: clock-generator@36 { /* SI5341 - u69 */
+                               compatible = "silabs,si5341";
                                reg = <0x36>;
+                               #clock-cells = <2>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&ref48>;
+                               clock-names = "xtal";
+                               clock-output-names = "si5341";
+
+                               si5341_0: out@0 {
+                                       /* refclk0 for PS-GT, used for DP */
+                                       reg = <0>;
+                                       always-on;
+                               };
+                               si5341_2: out@2 {
+                                       /* refclk2 for PS-GT, used for USB3 */
+                                       reg = <2>;
+                                       always-on;
+                               };
+                               si5341_3: out@3 {
+                                       /* refclk3 for PS-GT, used for SATA */
+                                       reg = <3>;
+                                       always-on;
+                               };
+                               si5341_6: out@6 {
+                                       /* refclk6 PL CLK125 */
+                                       reg = <6>;
+                                       always-on;
+                               };
+                               si5341_7: out@7 {
+                                       /* refclk7 PL CLK74 */
+                                       reg = <7>;
+                                       always-on;
+                               };
+                               si5341_9: out@9 {
+                                       /* refclk9 used for PS_REF_CLK 33.3 MHz */
+                                       reg = <9>;
+                                       always-on;
+                               };
                        };
 
                };
index d9a8fdb..92b3cee 100644 (file)
                compatible = "iio-hwmon";
                io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
        };
+
+       /* 48MHz reference crystal */
+       ref48: ref48M {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <48000000>;
+       };
 };
 
 &dcc {
                        #size-cells = <0>;
                        reg = <1>;
                        si5341: clock-generator@36 { /* SI5341 - u46 */
+                               compatible = "silabs,si5341";
                                reg = <0x36>;
+                               #clock-cells = <2>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&ref48>;
+                               clock-names = "xtal";
+                               clock-output-names = "si5341";
+
+                               si5341_0: out@0 {
+                                       /* refclk0 for PS-GT, used for DP */
+                                       reg = <0>;
+                                       always-on;
+                               };
+                               si5341_2: out@2 {
+                                       /* refclk2 for PS-GT, used for USB3 */
+                                       reg = <2>;
+                                       always-on;
+                               };
+                               si5341_3: out@3 {
+                                       /* refclk3 for PS-GT, used for SATA */
+                                       reg = <3>;
+                                       always-on;
+                               };
+                               si5341_5: out@5 {
+                                       /* refclk5 PL CLK100 */
+                                       reg = <5>;
+                                       always-on;
+                               };
+                               si5341_6: out@6 {
+                                       /* refclk6 PL CLK125 */
+                                       reg = <6>;
+                                       always-on;
+                               };
+                               si5341_9: out@9 {
+                                       /* refclk9 used for PS_REF_CLK 33.3 MHz */
+                                       reg = <9>;
+                                       always-on;
+                               };
                        };
-
                };
                i2c@2 {
                        #address-cells = <1>;