tcg_out_opc_reg(s, OPC_OR, args[0], args[1], args[2]);
}
break;
+ case INDEX_op_nor_i32:
+ tcg_out_opc_reg(s, OPC_NOR, args[0], args[1], args[2]);
+ break;
case INDEX_op_not_i32:
tcg_out_opc_reg(s, OPC_NOR, args[0], args[1], args[1]);
break;
{ INDEX_op_sub_i32, { "r", "rZ", "rJZ" } },
{ INDEX_op_and_i32, { "r", "rZ", "rIZ" } },
+ { INDEX_op_nor_i32, { "r", "rZ", "rZ" } },
{ INDEX_op_not_i32, { "r", "rZ" } },
{ INDEX_op_or_i32, { "r", "rZ", "rIZ" } },
{ INDEX_op_xor_i32, { "r", "rZ", "rIZ" } },
/* optional instructions */
#define TCG_TARGET_HAS_div_i32
#define TCG_TARGET_HAS_not_i32
+#define TCG_TARGET_HAS_nor_i32
#undef TCG_TARGET_HAS_rot_i32
#undef TCG_TARGET_HAS_ext8s_i32
#undef TCG_TARGET_HAS_ext16s_i32
#undef TCG_TARGET_HAS_orc_i32
#undef TCG_TARGET_HAS_eqv_i32
#undef TCG_TARGET_HAS_nand_i32
-#undef TCG_TARGET_HAS_nor_i32
/* optional instructions automatically implemented */
#undef TCG_TARGET_HAS_neg_i32 /* sub rd, zero, rt */