}
}
-/* Combine these with & instead of |. */
-#define NOOP_WAITCNT 0xf7f
-#define LGKM_CNT 0x07f
-#define VM_CNT 0xf70
-
-static void emit_waitcnt(struct si_shader_context *ctx, unsigned simm16)
+void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16)
{
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
waitcnt &= LGKM_CNT;
if (waitcnt != NOOP_WAITCNT)
- emit_waitcnt(ctx, waitcnt);
+ si_emit_waitcnt(ctx, waitcnt);
}
static void clock_emit(
}
if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE)
- emit_waitcnt(ctx, VM_CNT);
+ si_emit_waitcnt(ctx, VM_CNT);
readonly_memory = !(inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) &&
is_oneway_access_only(inst, info,
}
if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE)
- emit_waitcnt(ctx, VM_CNT);
+ si_emit_waitcnt(ctx, VM_CNT);
writeonly_memory = is_oneway_access_only(inst, info,
info->shader_buffers_load |
*/
if (ctx->screen->b.chip_class == SI &&
ctx->type == PIPE_SHADER_TESS_CTRL) {
- emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
+ si_emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
return;
}
const struct tgsi_opcode_info *info,
LLVMValueRef dst[4]);
+/* Combine these with & instead of |. */
+#define NOOP_WAITCNT 0xf7f
+#define LGKM_CNT 0x07f
+#define VM_CNT 0xf70
+
+void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16);
+
void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
#endif