arm64: dts: qcom: sc7280: align MPSS PAS node with bindings

The SC7180 MPSS/MSS remote processor can be brought to life using two
different bindings:
1. qcom,sc7280-mpss-pas - currently used in DTSI
2. qcom,sc7280-mss-pil

Move the properties related to qcom,sc7180-mss-pil (qcom,halt-regs,
qcom,ext-regs, qcom,qaccept-regs, resets and additional clocks) to
specific board using the PIL, to silence DT schema warnings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124184333.133911-5-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
index ad66e5e..bf522a6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
@@ -22,11 +22,28 @@
 
 &remoteproc_mpss {
        compatible = "qcom,sc7280-mss-pil";
+
+       clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+                <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
+                <&gcc GCC_MSS_SNOC_AXI_CLK>,
+                <&rpmhcc RPMH_PKA_CLK>,
+                <&rpmhcc RPMH_CXO_CLK>;
+       clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
+
        iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
        interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
        memory-region = <&mba_mem>, <&mpss_mem>;
        firmware-name = "qcom/sc7280-herobrine/modem/mba.mbn",
                        "qcom/sc7280-herobrine/modem/qdsp6sw.mbn";
+
+       resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+                <&pdc_reset PDC_MODEM_SYNC_RESET>;
+       reset-names = "mss_restart", "pdc_reset";
+
+       qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
+       qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
+       qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
+
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 0adf133..1e19e5b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2711,12 +2711,8 @@
                        interrupt-names = "wdog", "fatal", "ready", "handover",
                                          "stop-ack", "shutdown-ack";
 
-                       clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
-                                <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
-                                <&gcc GCC_MSS_SNOC_AXI_CLK>,
-                                <&rpmhcc RPMH_PKA_CLK>,
-                                <&rpmhcc RPMH_CXO_CLK>;
-                       clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
 
                        power-domains = <&rpmhpd SC7280_CX>,
                                        <&rpmhpd SC7280_MSS>;
@@ -2729,14 +2725,6 @@
                        qcom,smem-states = <&modem_smp2p_out 0>;
                        qcom,smem-state-names = "stop";
 
-                       resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
-                                <&pdc_reset PDC_MODEM_SYNC_RESET>;
-                       reset-names = "mss_restart", "pdc_reset";
-
-                       qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
-                       qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
-                       qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
-
                        status = "disabled";
 
                        glink-edge {