amd/drm-shim: add pitcairn

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>

diff --git a/src/amd/drm-shim/amdgpu_devices.c b/src/amd/drm-shim/amdgpu_devices.c
index 5bd36bb..fa5594d 100644 (file)
--- a/src/amd/drm-shim/amdgpu_devices.c
+++ b/src/amd/drm-shim/amdgpu_devices.c
@@ -1446,6 +1446,172 @@ const struct amdgpu_device amdgpu_devices[] = {
             .max_allocation = 12550218240,
          },
       },
+   },
+   {
+      .name = "pitcairn",
+      .radeon_family = CHIP_PITCAIRN,
+      .hw_ip_gfx = {
+         .hw_ip_version_major = 6,
+         .hw_ip_version_minor = 0,
+         .capabilities_flags = 0llu,
+         .ib_start_alignment = 32,
+         .ib_size_alignment = 32,
+         .available_rings = 0x1,
+         .ip_discovery_version = 0x0000,
+      },
+      .hw_ip_compute = {
+         .hw_ip_version_major = 6,
+         .hw_ip_version_minor = 0,
+         .capabilities_flags = 0llu,
+         .ib_start_alignment = 32,
+         .ib_size_alignment = 32,
+         .available_rings = 0x3,
+         .ip_discovery_version = 0x0000,
+      },
+      .fw_gfx_me = {
+         .ver = 145,
+         .feature = 29,
+      },
+      .fw_gfx_pfp = {
+         .ver = 84,
+         .feature = 29,
+      },
+      .fw_gfx_mec = {
+         .ver = 0,
+         .feature = 0,
+      },
+      .mmr_regs = {
+         0x263e, 0xffffffff, 0x12011003,
+         0x263d, 0x0000ff00, 0x00000001,
+         0xa0d4, 0x0000ff00, 0x2a001260,
+         0x263d, 0x0000ff01, 0x00000001,
+         0xa0d4, 0x0000ff01, 0x2a001260,
+         0x09d8, 0xffffffff, 0x0000025a,
+         0x2644, 0xffffffff, 0x00360292,
+         0x2645, 0xffffffff, 0x00360a92,
+         0x2646, 0xffffffff, 0x00361292,
+         0x2647, 0xffffffff, 0x00122a92,
+         0x2648, 0xffffffff, 0x0000028a,
+         0x2649, 0xffffffff, 0x00021a92,
+         0x264a, 0xffffffff, 0x00031292,
+         0x264b, 0xffffffff, 0x00022112,
+         0x264c, 0xffffffff, 0x00000004,
+         0x264d, 0xffffffff, 0x00000288,
+         0x264e, 0xffffffff, 0x00361290,
+         0x264f, 0xffffffff, 0x00351290,
+         0x2650, 0xffffffff, 0x00301a90,
+         0x2651, 0xffffffff, 0x00000289,
+         0x2652, 0xffffffff, 0x00321291,
+         0x2653, 0xffffffff, 0x00311291,
+         0x2654, 0xffffffff, 0x00301a91,
+         0x2655, 0xffffffff, 0x00302a91,
+         0x2656, 0xffffffff, 0x0000028d,
+         0x2657, 0xffffffff, 0x00302aa1,
+         0x2658, 0xffffffff, 0x00302a9d,
+         0x2659, 0xffffffff, 0x00131291,
+         0x265a, 0xffffffff, 0x00121291,
+         0x265b, 0xffffffff, 0x00031291,
+         0x265c, 0xffffffff, 0x00021a91,
+         0x265d, 0xffffffff, 0x00022111,
+         0x265e, 0xffffffff, 0x00022111,
+         0x265f, 0xffffffff, 0x00022111,
+         0x2660, 0xffffffff, 0x00022111,
+         0x2661, 0xffffffff, 0x00022111,
+         0x2662, 0xffffffff, 0x00012911,
+         0x2663, 0xffffffff, 0x00000000,
+      },
+      .mmr_reg_count = 38,
+      .dev = {
+         .device_id = 0x6818,
+         .chip_rev = 0x01,
+         .external_rev = 0x15,
+         .pci_rev = 0x00,
+         .family = AMDGPU_FAMILY_SI,
+         .num_shader_engines = 2,
+         .num_shader_arrays_per_engine = 2,
+         .gpu_counter_freq = 27000,
+         .max_engine_clock = 1100000llu,
+         .max_memory_clock = 1250000llu,
+         .cu_active_number = 20,
+         .cu_ao_mask = 0x1f1f1f1f,
+         .cu_bitmap = {
+            { 0x1f, 0x1f, 0x0, 0x0, },
+            { 0x1f, 0x1f, 0x0, 0x0, },
+            { 0x0, 0x0, 0x0, 0x0, },
+            { 0x0, 0x0, 0x0, 0x0, },
+         },
+         .enabled_rb_pipes_mask = 0xff,
+         .num_rb_pipes = 8,
+         .num_hw_gfx_contexts = 8,
+         .pcie_gen = 3,
+         .ids_flags = 0x0llu,
+         .virtual_address_offset = 0x200000llu,
+         .virtual_address_max = 0xfffe00000llu,
+         .virtual_address_alignment = 4096,
+         .pte_fragment_size = 2097152,
+         .gart_page_size = 4096,
+         .ce_ram_size = 32768,
+         .vram_type = 5,
+         .vram_bit_width = 256,
+         .vce_harvest_config = 0,
+         .gc_double_offchip_lds_buf = 0,
+         .prim_buf_gpu_addr = 0llu,
+         .pos_buf_gpu_addr = 0llu,
+         .cntl_sb_buf_gpu_addr = 0llu,
+         .param_buf_gpu_addr = 0llu,
+         .prim_buf_size = 0,
+         .pos_buf_size = 0,
+         .cntl_sb_buf_size = 0,
+         .param_buf_size = 0,
+         .wave_front_size = 0,
+         .num_shader_visible_vgprs = 256,
+         .num_cu_per_sh = 5,
+         .num_tcc_blocks = 8,
+         .gs_vgt_table_depth = 0,
+         .gs_prim_buffer_depth = 0,
+         .max_gs_waves_per_vgt = 32,
+         .pcie_num_lanes = 8,
+         .cu_ao_bitmap = {
+            { 0x1f, 0x1f, 0x0, 0x0, },
+            { 0x1f, 0x1f, 0x0, 0x0, },
+            { 0x0, 0x0, 0x0, 0x0, },
+            { 0x0, 0x0, 0x0, 0x0, },
+         },
+         .high_va_offset = 0x0llu,
+         .high_va_max = 0x0llu,
+         .pa_sc_tile_steering_override = 0,
+         .tcc_disabled_mask = 0llu,
+         .min_engine_clock = 300000llu,
+         .min_memory_clock = 150000llu,
+         .tcp_cache_size = 0,
+         .num_sqc_per_wgp = 0,
+         .sqc_data_cache_size = 0,
+         .sqc_inst_cache_size = 0,
+         .gl1c_cache_size = 0,
+         .gl2c_cache_size = 0,
+         .mall_size = 0llu,
+         .enabled_rb_pipes_mask_hi = 0,
+      },
+      .mem = {
+         .vram = {
+            .total_heap_size = 2147483648,
+            .usable_heap_size = 2134118400,
+            .heap_usage = 5238784,
+            .max_allocation = 1600588800,
+         },
+         .cpu_accessible_vram = {
+            .total_heap_size = 268435456,
+            .usable_heap_size = 263458816,
+            .heap_usage = 4976640,
+            .max_allocation = 197594112,
+         },
+         .gtt = {
+            .total_heap_size = 8363028480,
+            .usable_heap_size = 8359759872,
+            .heap_usage = 3530752,
+            .max_allocation = 6269819904,
+         },
+      },
    }
 };