return DIV_ROUND_UP(ns, ESC_TIME_NS);
}
-static void vc4_dsi_encoder_disable(struct drm_encoder *encoder)
+static void vc4_dsi_encoder_disable(struct drm_encoder *encoder,
+ struct drm_atomic_state *state)
{
struct vc4_dsi *dsi = to_vc4_dsi(encoder);
struct device *dev = &dsi->pdev->dev;
}
static void vc4_dsi_encoder_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
{
struct vc4_dsi *dsi = to_vc4_dsi(encoder);
struct device *dev = &dsi->pdev->dev;
+ const struct drm_display_mode *mode;
bool debug_dump_regs = false;
unsigned long hs_clock;
u32 ui_ns;
/* Minimum LP state duration in escape clock cycles. */
u32 lpx = dsi_esc_timing(60);
- unsigned long pixel_clock_hz = adjusted_mode->clock * 1000;
+ unsigned long pixel_clock_hz;
unsigned long dsip_clock;
unsigned long phy_clock;
int ret;
drm_print_regset32(&p, &dsi->regset);
}
+ mode = &crtc_state->adjusted_mode;
+
+ pixel_clock_hz = mode->clock * 1000;
+
/* Round up the clk_set_rate() request slightly, since
* PLLD_DSI1 is an integer divider and its rate selection will
* never round up.
vc4_dsi_ulps(dsi, false);
}
-static void vc4_dsi_encoder_enable(struct drm_encoder *encoder)
+static void vc4_dsi_encoder_enable(struct drm_encoder *encoder,
+ struct drm_atomic_state *state)
{
struct vc4_dsi *dsi = to_vc4_dsi(encoder);
bool debug_dump_regs = false;
};
static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = {
- .disable = vc4_dsi_encoder_disable,
- .enable = vc4_dsi_encoder_enable,
+ .atomic_disable = vc4_dsi_encoder_disable,
+ .atomic_enable = vc4_dsi_encoder_enable,
.mode_fixup = vc4_dsi_encoder_mode_fixup,
- .mode_set = vc4_dsi_encoder_mode_set,
+ .atomic_mode_set = vc4_dsi_encoder_mode_set,
};
static int vc4_dsi_late_register(struct drm_encoder *encoder)