arm64: dts: renesas: r9a07g043: Add TSU node
authorBiju Das <biju.das.jz@bp.renesas.com>
Sun, 1 May 2022 11:29:24 +0000 (12:29 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 6 May 2022 09:09:34 +0000 (11:09 +0200)
Add TSU node to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501112926.47024-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a07g043.dtsi

index e2300d5..cd7d307 100644 (file)
                        /* place holder */
                };
 
+               tsu: thermal@10059400 {
+                       compatible = "renesas,r9a07g043-tsu",
+                                    "renesas,rzg2l-tsu";
+                       reg = <0 0x10059400 0 0x400>;
+                       clocks = <&cpg CPG_MOD R9A07G043_TSU_PCLK>;
+                       resets = <&cpg R9A07G043_TSU_PRESETN>;
+                       power-domains = <&cpg>;
+                       #thermal-sensor-cells = <1>;
+               };
+
                sbc: spi@10060000 {
                        reg = <0 0x10060000 0 0x10000>,
                              <0 0x20000000 0 0x10000000>,
                };
        };
 
+       thermal-zones {
+               cpu-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsu 0>;
+
+                       trips {
+                               sensor_crit: sensor-crit {
+                                       temperature = <125000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,