media: cedrus: Fix endless loop in cedrus_h265_skip_bits()
authorDmitry Osipenko <dmitry.osipenko@collabora.com>
Thu, 18 Aug 2022 20:33:08 +0000 (22:33 +0200)
committerMauro Carvalho Chehab <mchehab@kernel.org>
Tue, 30 Aug 2022 12:48:45 +0000 (14:48 +0200)
The busy status bit may never de-assert if number of programmed skip
bits is incorrect, resulting in a kernel hang because the bit is polled
endlessly in the code. Fix it by adding timeout for the bit-polling.
This problem is reproducible by setting the data_bit_offset field of
the HEVC slice params to a wrong value by userspace.

Cc: stable@vger.kernel.org
Fixes: 7678c5462680 (media: cedrus: Fix decoding for some HEVC videos)
Reported-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
drivers/staging/media/sunxi/cedrus/cedrus_h265.c

index f703c585d91c5d16b653af2cb63ef232aec8c554..4952fc17f3e6d9f23f235e47a2b9ba44b9da563d 100644 (file)
@@ -234,8 +234,9 @@ static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num)
                cedrus_write(dev, VE_DEC_H265_TRIGGER,
                             VE_DEC_H265_TRIGGER_FLUSH_BITS |
                             VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp));
-               while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY)
-                       udelay(1);
+
+               if (cedrus_wait_for(dev, VE_DEC_H265_STATUS, VE_DEC_H265_STATUS_VLD_BUSY))
+                       dev_err_ratelimited(dev->dev, "timed out waiting to skip bits\n");
 
                count += tmp;
        }