osd: fix afbc decoder error caused flicker in display [1/1]

PD#OTT-3000

Problem:
afbc decoder error caused flicker in display.

Solution:
close osd prefetch.

Verify:
Verified with raven

Change-Id: I44356c028b41e251f7a98b5e931b2cbd583b0829
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>

diff --git a/drivers/amlogic/media/osd/osd_hw.c b/drivers/amlogic/media/osd/osd_hw.c
index c2242e9..2d8b6a5 100644 (file)
--- a/drivers/amlogic/media/osd/osd_hw.c
+++ b/drivers/amlogic/media/osd/osd_hw.c
@@ -5348,8 +5348,10 @@ static void osd_update_enable(u32 index)
                        notify_to_amvideo();
                        VSYNCOSD_CLR_MPEG_REG_MASK(VPP_MISC, temp_val);
                }
-               VSYNCOSD_CLR_MPEG_REG_MASK(
-                       osd_reg->osd_ctrl_stat, 1 << 0);
+               if (!(osd_hw.osd_meson_dev.cpu_id ==
+                       __MESON_CPU_MAJOR_ID_G12B))
+                       VSYNCOSD_CLR_MPEG_REG_MASK(
+                               osd_reg->osd_ctrl_stat, 1 << 0);
        }
        if (osd_hw.osd_meson_dev.afbc_type == MESON_AFBC) {
                if ((osd_hw.osd_afbcd[index].enable == ENABLE)
@@ -9198,13 +9200,11 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                                osd_reg_set_bits(
                                hw_osd_reg_array[idx].osd_fifo_ctrl_stat,
                                1, 10, 2);
-                               /* TODO: temp set at here,
-                                * need check for logo
-                                */
-                               if (idx > 0)
-                                       osd_reg_set_bits(
-                                       hw_osd_reg_array[idx].osd_ctrl_stat,
-                                       0, 0, 1);
+                               if (osd_hw.osd_meson_dev.cpu_id ==
+                                       __MESON_CPU_MAJOR_ID_G12B)
+                                       osd_reg_set_bits
+                                       (hw_osd_reg_array[idx].osd_ctrl_stat,
+                                       1, 0, 1);
                                osd_reg_set_bits(
                                hw_osd_reg_array[idx].osd_ctrl_stat,
                                0, 31, 1);