ASoC: rockchip: i2s: Add support for frame inversion
authorSugar Zhang <sugar.zhang@rock-chips.com>
Thu, 26 Aug 2021 04:03:12 +0000 (12:03 +0800)
committerMark Brown <broonie@kernel.org>
Thu, 26 Aug 2021 12:59:40 +0000 (13:59 +0100)
This patch adds support for frame inversion.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950594-14345-2-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_i2s.c
sound/soc/rockchip/rockchip_i2s.h

index 7ee5806..53e0b4a 100644 (file)
@@ -211,13 +211,27 @@ static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
 
        regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);
 
-       mask = I2S_CKR_CKP_MASK;
+       mask = I2S_CKR_CKP_MASK | I2S_CKR_TLP_MASK | I2S_CKR_RLP_MASK;
        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
        case SND_SOC_DAIFMT_NB_NF:
-               val = I2S_CKR_CKP_NEG;
+               val = I2S_CKR_CKP_NORMAL |
+                     I2S_CKR_TLP_NORMAL |
+                     I2S_CKR_RLP_NORMAL;
+               break;
+       case SND_SOC_DAIFMT_NB_IF:
+               val = I2S_CKR_CKP_NORMAL |
+                     I2S_CKR_TLP_INVERTED |
+                     I2S_CKR_RLP_INVERTED;
                break;
        case SND_SOC_DAIFMT_IB_NF:
-               val = I2S_CKR_CKP_POS;
+               val = I2S_CKR_CKP_INVERTED |
+                     I2S_CKR_TLP_NORMAL |
+                     I2S_CKR_RLP_NORMAL;
+               break;
+       case SND_SOC_DAIFMT_IB_IF:
+               val = I2S_CKR_CKP_INVERTED |
+                     I2S_CKR_TLP_INVERTED |
+                     I2S_CKR_RLP_INVERTED;
                break;
        default:
                ret = -EINVAL;
index fcaae24..251851b 100644 (file)
 #define I2S_CKR_MSS_SLAVE      (1 << I2S_CKR_MSS_SHIFT)
 #define I2S_CKR_MSS_MASK       (1 << I2S_CKR_MSS_SHIFT)
 #define I2S_CKR_CKP_SHIFT      26
-#define I2S_CKR_CKP_NEG                (0 << I2S_CKR_CKP_SHIFT)
-#define I2S_CKR_CKP_POS                (1 << I2S_CKR_CKP_SHIFT)
+#define I2S_CKR_CKP_NORMAL     (0 << I2S_CKR_CKP_SHIFT)
+#define I2S_CKR_CKP_INVERTED   (1 << I2S_CKR_CKP_SHIFT)
 #define I2S_CKR_CKP_MASK       (1 << I2S_CKR_CKP_SHIFT)
 #define I2S_CKR_RLP_SHIFT      25
 #define I2S_CKR_RLP_NORMAL     (0 << I2S_CKR_RLP_SHIFT)
-#define I2S_CKR_RLP_OPPSITE    (1 << I2S_CKR_RLP_SHIFT)
+#define I2S_CKR_RLP_INVERTED   (1 << I2S_CKR_RLP_SHIFT)
+#define I2S_CKR_RLP_MASK       (1 << I2S_CKR_RLP_SHIFT)
 #define I2S_CKR_TLP_SHIFT      24
 #define I2S_CKR_TLP_NORMAL     (0 << I2S_CKR_TLP_SHIFT)
-#define I2S_CKR_TLP_OPPSITE    (1 << I2S_CKR_TLP_SHIFT)
+#define I2S_CKR_TLP_INVERTED   (1 << I2S_CKR_TLP_SHIFT)
+#define I2S_CKR_TLP_MASK       (1 << I2S_CKR_TLP_SHIFT)
 #define I2S_CKR_MDIV_SHIFT     16
 #define I2S_CKR_MDIV(x)                ((x - 1) << I2S_CKR_MDIV_SHIFT)
 #define I2S_CKR_MDIV_MASK      (0xff << I2S_CKR_MDIV_SHIFT)