Revert '[RISCV] Remove 'sx' when parsing arch string to match the latest ISA manual'

This reverts commit fbc63e5658f67036d4ea57940459074d9ecdd2d8

diff --git a/clang/test/Driver/riscv-arch.c b/clang/test/Driver/riscv-arch.c
index 4d11db2..573f4a6 100644 (file)
--- a/clang/test/Driver/riscv-arch.c
+++ b/clang/test/Driver/riscv-arch.c
@@ -253,6 +253,11 @@
 // RV32X: error: invalid arch name 'rv32xabc',
 // RV32X: first letter should be 'e', 'i' or 'g'
 
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32sxabc -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32SX %s
+// RV32SX: error: invalid arch name 'rv32sxabc',
+// RV32SX: first letter should be 'e', 'i' or 'g'
+
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32sabc -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32S %s
 // RV32S: error: invalid arch name 'rv32sabc',
@@ -263,15 +268,21 @@
 // RV32X-NAME: error: invalid arch name 'rv32ix',
 // RV32X-NAME: non-standard user-level extension name missing after 'x'
 
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isx -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32SX-NAME %s
+// RV32SX-NAME: error: invalid arch name 'rv32isx',
+// RV32SX-NAME: non-standard supervisor-level extension
+// RV32SX-NAME: name missing after 'sx'
+
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32is -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32S-NAME %s
 // RV32S-NAME: error: invalid arch name 'rv32is',
 // RV32S-NAME: standard supervisor-level extension
 // RV32S-NAME: name missing after 's'
 
-// RUN: %clang --target=riscv32-unknown-elf -march=rv32ix_s -### %s \
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32ix_s_sx -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32ALL-NAME %s
-// RV32ALL-NAME: error: invalid arch name 'rv32ix_s',
+// RV32ALL-NAME: error: invalid arch name 'rv32ix_s_sx',
 // RV32ALL-NAME: non-standard user-level extension
 // RV32ALL-NAME: name missing after 'x'
 
@@ -285,9 +296,14 @@
 // RV32S-UNS: error: invalid arch name 'rv32isa',
 // RV32S-UNS: unsupported standard supervisor-level extension 'sa'
 
-// RUN: %clang --target=riscv32-unknown-elf -march=rv32isp_xabc -### %s \
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isxabc -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32SX-UNS %s
+// RV32SX-UNS: error: invalid arch name 'rv32isxabc',
+// RV32SX-UNS: unsupported non-standard supervisor-level extension 'sxabc'
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isp_xabc_sxlw -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32ALL %s
-// RV32ALL: error: invalid arch name 'rv32isp_xabc',
+// RV32ALL: error: invalid arch name 'rv32isp_xabc_sxlw',
 // RV32ALL: unsupported standard supervisor-level extension 'sp'
 
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32i20 -### %s \
@@ -320,6 +336,11 @@
 // RV32-SMINOR0: error: invalid arch name 'rv32ist2p0',
 // RV32-SMINOR0: unsupported version number 2.0 for extension 'st'
 
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isxt2p1 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-SXMINOR1 %s
+// RV32-SXMINOR1: error: invalid arch name 'rv32isxt2p1', unsupported
+// RV32-SXMINOR1: version number 2.1 for extension 'sxt'
+
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32ixabc_ -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-XSEP %s
 // RV32-XSEP: error: invalid arch name 'rv32ixabc_',
@@ -336,6 +357,12 @@
 // RV32-X-ORDER: standard supervisor-level extension not given
 // RV32-X-ORDER: in canonical order 'sabc'
 
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isxabc_sdef -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-S-ORDER %s
+// RV32-S-ORDER: error: invalid arch name 'rv32isxabc_sdef',
+// RV32-S-ORDER: standard supervisor-level extension not given
+// RV32-S-ORDER: in canonical order 'sdef'
+
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32ixabc_xabc -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-XDUP %s
 // RV32-XDUP: error: invalid arch name 'rv32ixabc_xabc',
@@ -346,10 +373,10 @@
 // RV32-X-X-INVAL: error: invalid arch name 'rv32ixabc_xdef', unsupported
 // RV32-X-X-INVAL: non-standard user-level extension 'xabc'
 
-// RUN: %clang --target=riscv32-unknown-elf -march=rv32isdef_xabc -### %s \
-// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-S-INVAL %s
-// RV32-X-S-INVAL: error: invalid arch name 'rv32isdef_xabc',
-// RV32-X-S-INVAL: unsupported standard supervisor-level extension 'sdef'
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isdef_xabc_sxghi -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-S-SX-INVAL %s
+// RV32-X-S-SX-INVAL: error: invalid arch name 'rv32isdef_xabc_sxghi',
+// RV32-X-S-SX-INVAL: unsupported standard supervisor-level extension 'sdef'
 
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32i -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-TARGET %s

diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp
index 4cb7088..d5523ef 100644 (file)
--- a/llvm/lib/Support/RISCVISAInfo.cpp
+++ b/llvm/lib/Support/RISCVISAInfo.cpp
@@ -217,6 +217,8 @@ void RISCVISAInfo::addExtension(StringRef ExtName, unsigned MajorVersion,
 }
 
 static StringRef getExtensionTypeDesc(StringRef Ext) {
+  if (Ext.startswith("sx"))
+    return "non-standard supervisor-level extension";
   if (Ext.startswith("s"))
     return "standard supervisor-level extension";
   if (Ext.startswith("x"))
@@ -227,6 +229,8 @@ static StringRef getExtensionTypeDesc(StringRef Ext) {
 }
 
 static StringRef getExtensionType(StringRef Ext) {
+  if (Ext.startswith("sx"))
+    return "sx";
   if (Ext.startswith("s"))
     return "s";
   if (Ext.startswith("x"))
@@ -636,7 +640,7 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
   StringRef Exts = Arch.substr(5);
 
   // Remove multi-letter standard extensions, non-standard extensions and
-  // supervisor-level extensions. They have 'z', 'x', 's' prefixes.
+  // supervisor-level extensions. They have 'z', 'x', 's', 'sx' prefixes.
   // Parse them at the end.
   // Find the very first occurrence of 's', 'x' or 'z'.
   StringRef OtherExts;
@@ -755,7 +759,7 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
   // Parse the ISA string containing non-standard user-level
   // extensions, standard supervisor-level extensions and
   // non-standard supervisor-level extensions.
-  // These extensions start with 'z', 's', 'x' prefixes, follow a
+  // These extensions start with 'z', 's', 'x', 'sx' prefixes, follow a
   // canonical order, might have a version number (major, minor)
   // and are separated by a single underscore '_'.
   // Set the hardware features for the extensions that are supported.
@@ -766,7 +770,7 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
   OtherExts.split(Split, '_');
 
   SmallVector<StringRef, 8> AllExts;
-  std::array<StringRef, 4> Prefix{"z", "s", "x"};
+  std::array<StringRef, 4> Prefix{"z", "s", "x", "sx"};
   auto I = Prefix.begin();
   auto E = Prefix.end();
   if (Split.size() > 1 || Split[0] != "") {

diff --git a/llvm/unittests/Support/RISCVISAInfoTest.cpp b/llvm/unittests/Support/RISCVISAInfoTest.cpp
index a301b25..44f1abd 100644 (file)
--- a/llvm/unittests/Support/RISCVISAInfoTest.cpp
+++ b/llvm/unittests/Support/RISCVISAInfoTest.cpp
@@ -225,13 +225,17 @@ TEST(ParseArchString, RejectsUnrecognizedExtensionNamesByDefault) {
       "unsupported standard supervisor-level extension 'smadeup'");
   EXPECT_EQ(
       toString(
+          RISCVISAInfo::parseArchString("rv64g_sxmadeup", true).takeError()),
+      "unsupported non-standard supervisor-level extension 'sxmadeup'");
+  EXPECT_EQ(
+      toString(
           RISCVISAInfo::parseArchString("rv64g_xmadeup", true).takeError()),
       "unsupported non-standard user-level extension 'xmadeup'");
 }
 
 TEST(ParseArchString, IgnoresUnrecognizedExtensionNamesWithIgnoreUnknown) {
-  for (StringRef Input : {"rv32ib", "rv32i_zmadeup",
-                          "rv64i_smadeup", "rv64i_xmadeup"}) {
+  for (StringRef Input : {"rv32ib", "rv32i_zmadeup", "rv64i_smadeup",
+                          "rv32i_sxmadeup", "rv64i_xmadeup"}) {
     auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true, false, true);
     ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
     RISCVISAInfo &Info = **MaybeISAInfo;