Revert "[mlir][sparse] Expose SparseTensor passes as enums instead of opaque"
authorNick Kreeger <nick.kreeger@gmail.com>
Sat, 3 Sep 2022 20:47:40 +0000 (15:47 -0500)
committerNick Kreeger <nick.kreeger@gmail.com>
Sat, 3 Sep 2022 20:47:40 +0000 (15:47 -0500)
This reverts commit ef25b5d93d0b5621eb5d0482abd30a4e127e9223.

27 files changed:
mlir/benchmark/python/common.py
mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
mlir/test/Dialect/SparseTensor/sparse_parallel.mlir
mlir/test/Dialect/SparseTensor/sparse_vector.mlir
mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir
mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir
mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py
mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py
mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py

index 3634641..b226925 100644 (file)
@@ -13,8 +13,8 @@ def setup_passes(mlir_module):
     """Setup pass pipeline parameters for benchmark functions.
     """
     opt = (
-        "parallelization-strategy=none"
-        " vectorization-strategy=none vl=1 enable-simd-index32=False"
+        "parallelization-strategy=0"
+        " vectorization-strategy=0 vl=1 enable-simd-index32=False"
     )
     pipeline = f"sparse-compiler{{{opt}}}"
     PassManager.parse(pipeline).run(mlir_module)
index 580b967..43abadd 100644 (file)
@@ -30,43 +30,12 @@ namespace sparse_tensor {
 struct SparseCompilerOptions
     : public PassPipelineOptions<SparseCompilerOptions> {
   // These options must be kept in sync with `SparsificationBase`.
-  // TODO(57514): These options are duplicated in Passes.td.
-  PassOptions::Option<mlir::SparseParallelizationStrategy> parallelization{
+  PassOptions::Option<int32_t> parallelization{
       *this, "parallelization-strategy",
-      ::llvm::cl::desc("Set the parallelization strategy"),
-      ::llvm::cl::init(mlir::SparseParallelizationStrategy::kNone),
-      llvm::cl::values(
-          clEnumValN(mlir::SparseParallelizationStrategy::kNone, "none",
-                     "Turn off sparse parallelization."),
-          clEnumValN(mlir::SparseParallelizationStrategy::kDenseOuterLoop,
-                     "dense-outer-loop",
-                     "Enable dense outer loop sparse parallelization."),
-          clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageOuterLoop,
-                     "any-storage-outer-loop",
-                     "Enable sparse parallelization regardless of storage for "
-                     "the outer loop."),
-          clEnumValN(mlir::SparseParallelizationStrategy::kDenseAnyLoop,
-                     "dense-any-loop",
-                     "Enable dense parallelization for any loop."),
-          clEnumValN(
-              mlir::SparseParallelizationStrategy::kAnyStorageAnyLoop,
-              "any-storage-any-loop",
-              "Enable sparse parallelization for any storage and loop."))};
-  PassOptions::Option<mlir::SparseVectorizationStrategy> vectorization{
-      *this, "vectorization-strategy",
-      ::llvm::cl::desc("Set the vectorization strategy"),
-      ::llvm::cl::init(mlir::SparseVectorizationStrategy::kNone),
-      llvm::cl::values(
-          clEnumValN(mlir::SparseVectorizationStrategy::kNone, "none",
-                     "Turn off sparse vectorization."),
-          clEnumValN(mlir::SparseVectorizationStrategy::kDenseInnerLoop,
-                     "dense-inner-loop",
-                     "Enable vectorization for dense inner loops."),
-          clEnumValN(mlir::SparseVectorizationStrategy::kAnyStorageInnerLoop,
-                     "any-storage-inner-loop",
-                     "Enable sparse vectorization for inner loops with any "
-                     "storage."))};
-
+      desc("Set the parallelization strategy"), init(0)};
+  PassOptions::Option<int32_t> vectorization{
+      *this, "vectorization-strategy", desc("Set the vectorization strategy"),
+      init(0)};
   PassOptions::Option<int32_t> vectorLength{
       *this, "vl", desc("Set the vector length"), init(1)};
   PassOptions::Option<bool> enableSIMDIndex32{
@@ -81,8 +50,10 @@ struct SparseCompilerOptions
 
   /// Projects out the options for `createSparsificationPass`.
   SparsificationOptions sparsificationOptions() const {
-    return SparsificationOptions(parallelization, vectorization, vectorLength,
-                                 enableSIMDIndex32, enableVLAVectorization);
+    return SparsificationOptions(sparseParallelizationStrategy(parallelization),
+                                 sparseVectorizationStrategy(vectorization),
+                                 vectorLength, enableSIMDIndex32,
+                                 enableVLAVectorization);
   }
 
   // These options must be kept in sync with `SparseTensorConversionBase`.
index e9ccd7c..523f1fb 100644 (file)
@@ -49,6 +49,9 @@ enum class SparseParallelizationStrategy {
   // TODO: support reduction parallelization too?
 };
 
+/// Converts command-line parallelization flag to the strategy enum.
+SparseParallelizationStrategy sparseParallelizationStrategy(int32_t flag);
+
 /// Defines a vectorization strategy. Any inner loop is a candidate (full SIMD
 /// for parallel loops and horizontal SIMD for reduction loops). A loop is
 /// actually vectorized if (1) allowed by the strategy, and (2) the emitted
@@ -59,6 +62,9 @@ enum class SparseVectorizationStrategy {
   kAnyStorageInnerLoop
 };
 
+/// Converts command-line vectorization flag to the strategy enum.
+SparseVectorizationStrategy sparseVectorizationStrategy(int32_t flag);
+
 /// Options for the Sparsification pass.
 struct SparsificationOptions {
   SparsificationOptions(SparseParallelizationStrategy p,
index cd6b77e..8f96280 100644 (file)
@@ -62,36 +62,11 @@ def SparsificationPass : Pass<"sparsification", "ModuleOp"> {
     "sparse_tensor::SparseTensorDialect",
     "vector::VectorDialect",
   ];
-  // TODO(57514): These enum options are duplicated in Passes.h.
   let options = [
-    Option<"parallelization", "parallelization-strategy", "mlir::SparseParallelizationStrategy",
-           "mlir::SparseParallelizationStrategy::kNone",
-           "Set the parallelization strategy", [{llvm::cl::values(
-             clEnumValN(mlir::SparseParallelizationStrategy::kNone, "none",
-                        "Turn off sparse parallelization."),
-             clEnumValN(mlir::SparseParallelizationStrategy::kDenseOuterLoop,
-                        "dense-outer-loop",
-                        "Enable dense outer loop sparse parallelization."),
-             clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageOuterLoop,
-                        "any-storage-outer-loop",
-                        "Enable sparse parallelization regardless of storage for the outer loop."),
-             clEnumValN(mlir::SparseParallelizationStrategy::kDenseAnyLoop,
-                        "dense-any-loop",
-                        "Enable dense parallelization for any loop."),
-             clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageAnyLoop,
-                        "any-storage-any-loop",
-                        "Enable sparse parallelization for any storage and loop."))}]>,
-    Option<"vectorization", "vectorization-strategy", "mlir::SparseVectorizationStrategy",
-           "mlir::SparseVectorizationStrategy::kNone",
-           "Set the vectorization strategy", [{llvm::cl::values(
-             clEnumValN(mlir::SparseVectorizationStrategy::kNone, "none",
-                        "Turn off sparse vectorization."),
-             clEnumValN(mlir::SparseVectorizationStrategy::kDenseInnerLoop,
-                        "dense-inner-loop",
-                        "Enable vectorization for dense inner loops."),
-             clEnumValN(mlir::SparseVectorizationStrategy::kAnyStorageInnerLoop,
-                        "any-storage-inner-loop",
-                        "Enable sparse vectorization for inner loops with any storage."))}]>,
+    Option<"parallelization", "parallelization-strategy", "int32_t", "0",
+           "Set the parallelization strategy">,
+    Option<"vectorization", "vectorization-strategy", "int32_t", "0",
+           "Set the vectorization strategy">,
     Option<"vectorLength", "vl", "int32_t", "1",
            "Set the vector length">,
     Option<"enableSIMDIndex32", "enable-simd-index32", "bool", "false",
index c79ca95..9057921 100644 (file)
@@ -43,8 +43,8 @@ struct SparsificationPass
   SparsificationPass() = default;
   SparsificationPass(const SparsificationPass &pass) = default;
   SparsificationPass(const SparsificationOptions &options) {
-    parallelization = options.parallelizationStrategy;
-    vectorization = options.vectorizationStrategy;
+    parallelization = static_cast<int32_t>(options.parallelizationStrategy);
+    vectorization = static_cast<int32_t>(options.vectorizationStrategy);
     vectorLength = options.vectorLength;
     enableSIMDIndex32 = options.enableSIMDIndex32;
     enableVLAVectorization = options.enableVLAVectorization;
@@ -57,8 +57,10 @@ struct SparsificationPass
     populateSparseTensorRewriting(prePatterns);
     (void)applyPatternsAndFoldGreedily(getOperation(), std::move(prePatterns));
     // Translate strategy flags to strategy options.
-    SparsificationOptions options(parallelization, vectorization, vectorLength,
-                                  enableSIMDIndex32, enableVLAVectorization);
+    SparsificationOptions options(
+        sparseParallelizationStrategy(parallelization),
+        sparseVectorizationStrategy(vectorization), vectorLength,
+        enableSIMDIndex32, enableVLAVectorization);
     // Apply sparsification and vector cleanup rewriting.
     RewritePatternSet patterns(ctx);
     populateSparsificationPatterns(patterns, options);
@@ -236,6 +238,33 @@ struct SparseTensorStorageExpansionPass
 // Strategy flag methods.
 //===----------------------------------------------------------------------===//
 
+SparseParallelizationStrategy
+mlir::sparseParallelizationStrategy(int32_t flag) {
+  switch (flag) {
+  default:
+    return SparseParallelizationStrategy::kNone;
+  case 1:
+    return SparseParallelizationStrategy::kDenseOuterLoop;
+  case 2:
+    return SparseParallelizationStrategy::kAnyStorageOuterLoop;
+  case 3:
+    return SparseParallelizationStrategy::kDenseAnyLoop;
+  case 4:
+    return SparseParallelizationStrategy::kAnyStorageAnyLoop;
+  }
+}
+
+SparseVectorizationStrategy mlir::sparseVectorizationStrategy(int32_t flag) {
+  switch (flag) {
+  default:
+    return SparseVectorizationStrategy::kNone;
+  case 1:
+    return SparseVectorizationStrategy::kDenseInnerLoop;
+  case 2:
+    return SparseVectorizationStrategy::kAnyStorageInnerLoop;
+  }
+}
+
 SparseToSparseConversionStrategy
 mlir::sparseToSparseConversionStrategy(int32_t flag) {
   switch (flag) {
index 5e02681..9af037c 100644 (file)
@@ -1,12 +1,12 @@
-// RUN: mlir-opt %s -sparsification="parallelization-strategy=none" | \
+// RUN: mlir-opt %s -sparsification="parallelization-strategy=0" | \
 // RUN:   FileCheck %s --check-prefix=CHECK-PAR0
-// RUN: mlir-opt %s -sparsification="parallelization-strategy=dense-outer-loop" | \
+// RUN: mlir-opt %s -sparsification="parallelization-strategy=1" | \
 // RUN:   FileCheck %s --check-prefix=CHECK-PAR1
-// RUN: mlir-opt %s -sparsification="parallelization-strategy=any-storage-outer-loop" | \
+// RUN: mlir-opt %s -sparsification="parallelization-strategy=2" | \
 // RUN:   FileCheck %s --check-prefix=CHECK-PAR2
-// RUN: mlir-opt %s -sparsification="parallelization-strategy=dense-any-loop" | \
+// RUN: mlir-opt %s -sparsification="parallelization-strategy=3" | \
 // RUN:   FileCheck %s --check-prefix=CHECK-PAR3
-// RUN: mlir-opt %s -sparsification="parallelization-strategy=any-storage-any-loop" | \
+// RUN: mlir-opt %s -sparsification="parallelization-strategy=4" | \
 // RUN:   FileCheck %s --check-prefix=CHECK-PAR4
 
 #DenseMatrix = #sparse_tensor.encoding<{
index a730e77..816a5c7 100644 (file)
@@ -1,12 +1,12 @@
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=none vl=16" -cse -split-input-file | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=0 vl=16" -cse -split-input-file | \
 // RUN:   FileCheck %s --check-prefix=CHECK-VEC0
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=dense-inner-loop vl=16" -cse -split-input-file | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=1 vl=16" -cse -split-input-file | \
 // RUN:   FileCheck %s --check-prefix=CHECK-VEC1
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16" -cse -split-input-file | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16" -cse -split-input-file | \
 // RUN:   FileCheck %s --check-prefix=CHECK-VEC2
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16 enable-simd-index32=true" -cse -split-input-file | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16 enable-simd-index32=true" -cse -split-input-file | \
 // RUN:   FileCheck %s --check-prefix=CHECK-VEC3
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=4 enable-vla-vectorization=true" -cse -split-input-file | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=4 enable-vla-vectorization=true" -cse -split-input-file | \
 // RUN:   FileCheck %s --check-prefix=CHECK-VEC4
 
 #DenseVector = #sparse_tensor.encoding<{ dimLevelType = [ "dense" ] }>
index 69eaa7b..bd557c3 100644 (file)
@@ -1,6 +1,6 @@
 // NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
 
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=8" -canonicalize | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=8" -canonicalize | \
 // RUN:   FileCheck %s
 
 #SparseMatrix = #sparse_tensor.encoding<{dimLevelType = ["dense","compressed"]}>
index fd8ceb7..dfea43e 100644 (file)
@@ -5,7 +5,7 @@
 // about what constitutes a good test! The CHECK should be
 // minimized and named to reflect the test intent.
 
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=8" -canonicalize | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=8" -canonicalize | \
 // RUN:   FileCheck %s
 
 #SparseVector = #sparse_tensor.encoding<{
index 276b8a9..65f1f72 100644 (file)
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16" -scf-for-loop-peeling -canonicalize | \
+// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16" -scf-for-loop-peeling -canonicalize | \
 // RUN:   FileCheck %s
 
 #SparseVector = #sparse_tensor.encoding<{
index a599782..569d8b1 100644 (file)
@@ -6,7 +6,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
index bbe4807..52b8400 100644 (file)
@@ -5,7 +5,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \
 // RUN: mlir-cpu-runner -e entry -entry-point-result=void \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
index 172d390..4567049 100644 (file)
@@ -7,7 +7,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/test.tns" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index 983651f..7fefead 100644 (file)
@@ -5,7 +5,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \
 // RUN: mlir-cpu-runner -e entry -entry-point-result=void \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
index 4e0b9af..17be14d 100644 (file)
@@ -8,7 +8,7 @@
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
 // RUN: mlir-opt %s \
-// RUN:   --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=16 enable-simd-index32" | \
+// RUN:   --sparse-compiler="vectorization-strategy=2 vl=16 enable-simd-index32" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/wide.mtx" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index d21208d..74302a7 100644 (file)
@@ -7,7 +7,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/mttkrp_b.tns" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index 7079ec0..8bd0133 100644 (file)
@@ -7,7 +7,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/test.mtx" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index 30e04fe..94ab5e4 100644 (file)
@@ -5,7 +5,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \
 // RUN: mlir-cpu-runner -e entry -entry-point-result=void \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
index 220fa18..10a1859 100644 (file)
@@ -5,7 +5,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s -sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=8" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=8" | \
 // RUN: mlir-cpu-runner -e entry -entry-point-result=void \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
index fc3dfa1..55fe32b 100644 (file)
@@ -8,7 +8,7 @@
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
 // RUN: mlir-opt %s \
-// RUN:   --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4 enable-simd-index32" | \
+// RUN:   --sparse-compiler="vectorization-strategy=2 vl=4 enable-simd-index32" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/test.mtx" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index 8b2f987..3c7f741 100755 (executable)
@@ -5,7 +5,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s -sparse-compiler="vl=8" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=8" | \
 // RUN: mlir-cpu-runner -e entry -entry-point-result=void \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
index 7d46b26..5650715 100644 (file)
@@ -6,7 +6,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
 // RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
index 33ce4b9..3b48367 100644 (file)
@@ -7,7 +7,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/wide.mtx" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index 54cd090..1c29f8c 100644 (file)
@@ -7,7 +7,7 @@
 //
 // Do the same run, but now with SIMDization as well. This should not change the outcome.
 //
-// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \
+// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \
 // RUN: TENSOR0="%mlir_integration_test_dir/data/test_symmetric.mtx" \
 // RUN: mlir-cpu-runner \
 // RUN:  -e entry -entry-point-result=void  \
index a6abb3c..4ed741e 100644 (file)
@@ -140,24 +140,22 @@ def main():
             ir.AffineMap.get_permutation([0, 1]),
             ir.AffineMap.get_permutation([1, 0])
         ]
-        vec_strategy = [
-          'none', 'dense-inner-loop'
-        ]
         for level in levels:
             for ordering in orderings:
                 for pwidth in [32]:
                     for iwidth in [32]:
-                        for vec in vec_strategy:
-                            for e in [True]:
-                                vl = 1 if vec == 0 else 16
-                                attr = st.EncodingAttr.get(level, ordering, pwidth, iwidth)
-                                opt = (f'parallelization-strategy=none '
-                                       f'vectorization-strategy={vec} '
-                                       f'vl={vl} enable-simd-index32={e}')
-                                compiler = sparse_compiler.SparseCompiler(
-                                    options=opt, opt_level=0, shared_libs=[support_lib])
-                                build_compile_and_run_SDDMMM(attr, compiler)
-                                count = count + 1
+                        for par in [0]:
+                            for vec in [0, 1]:
+                                for e in [True]:
+                                    vl = 1 if vec == 0 else 16
+                                    attr = st.EncodingAttr.get(level, ordering, pwidth, iwidth)
+                                    opt = (f'parallelization-strategy={par} '
+                                           f'vectorization-strategy={vec} '
+                                           f'vl={vl} enable-simd-index32={e}')
+                                    compiler = sparse_compiler.SparseCompiler(
+                                        options=opt, opt_level=0, shared_libs=[support_lib])
+                                    build_compile_and_run_SDDMMM(attr, compiler)
+                                    count = count + 1
     # CHECK: Passed 16 tests
     print('Passed ', count, 'tests')
 
index 57ca3d6..9712620 100644 (file)
@@ -120,10 +120,12 @@ def main():
         # a *single* sparse tensor. Note that we deliberate do not exhaustively
         # search the full state space to reduce runtime of the test. It is
         # straightforward to adapt the code below to explore more combinations.
+        par = 0
+        vec = 0
         vl = 1
         e = False
-        opt = (f'parallelization-strategy=none '
-               f'vectorization-strategy=none '
+        opt = (f'parallelization-strategy={par} '
+               f'vectorization-strategy={vec} '
                f'vl={vl} enable-simd-index32={e}')
         levels = [[st.DimLevelType.dense, st.DimLevelType.dense],
                   [st.DimLevelType.dense, st.DimLevelType.compressed],
index 01add6f..a030643 100644 (file)
@@ -183,6 +183,8 @@ def main():
   # CHECK-LABEL: TEST: test_stress
   print("\nTEST: test_stress")
   with ir.Context() as ctx, ir.Location.unknown():
+    par = 0
+    vec = 0
     vl = 1
     e = False
     # Disable direct sparse2sparse conversion, because it doubles the time!
@@ -191,8 +193,8 @@ def main():
     # `s2s=0` on a regular basis, to ensure that it does continue to work.
     s2s = 1
     sparsification_options = (
-        f'parallelization-strategy=none '
-        f'vectorization-strategy=none '
+        f'parallelization-strategy={par} '
+        f'vectorization-strategy={vec} '
         f'vl={vl} '
         f'enable-simd-index32={e} '
         f's2s-strategy={s2s}')