[Patch][GCC][middle-end] - Generate FRINTZ for (double)(int) under -ffast-math on...
authorAndre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
Wed, 20 Oct 2021 12:12:09 +0000 (13:12 +0100)
committerAndre Vieira <andre.simoesdiasvieira@arm.com>
Wed, 20 Oct 2021 12:14:39 +0000 (13:14 +0100)
20-10-2021  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Jirui Wu  <jirui.wu@arm.com>
gcc/ChangeLog:

* match.pd: Generate IFN_TRUNC.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/merge_trunc1.c: New test.

gcc/match.pd
gcc/testsuite/gcc.target/aarch64/merge_trunc1.c [new file with mode: 0644]

index 3ff15bc..5bed2e1 100644 (file)
@@ -3606,6 +3606,19 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
         >= inside_prec - !inside_unsignedp)
      (convert @0)))))))
 
+/* (float_type)(integer_type) x -> trunc (x) if the type of x matches
+   float_type.  Only do the transformation if we do not need to preserve
+   trapping behaviour, so require !flag_trapping_math. */
+#if GIMPLE
+(simplify
+   (float (fix_trunc @0))
+   (if (!flag_trapping_math
+       && types_match (type, TREE_TYPE (@0))
+       && direct_internal_fn_supported_p (IFN_TRUNC, type,
+                                         OPTIMIZE_FOR_BOTH))
+      (IFN_TRUNC @0)))
+#endif
+
 /* If we have a narrowing conversion to an integral type that is fed by a
    BIT_AND_EXPR, we might be able to remove the BIT_AND_EXPR if it merely
    masks off bits outside the final type (and nothing else).  */
diff --git a/gcc/testsuite/gcc.target/aarch64/merge_trunc1.c b/gcc/testsuite/gcc.target/aarch64/merge_trunc1.c
new file mode 100644 (file)
index 0000000..0721706
--- /dev/null
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math" } */
+
+float
+f1 (float x)
+{
+  int y = x;
+
+  return (float) y;
+}
+
+double
+f2 (double x)
+{
+  long y = x;
+
+  return (double) y;
+}
+
+float
+f3 (double x)
+{
+  int y = x;
+
+  return (float) y;
+}
+
+double
+f4 (float x)
+{
+  int y = x;
+
+  return (double) y;
+}
+
+/* { dg-final { scan-assembler "frintz\\ts\[0-9\]+, s\[0-9\]+" } } */
+/* { dg-final { scan-assembler "frintz\\td\[0-9\]+, d\[0-9\]+" } } */
+/* { dg-final { scan-assembler "fcvtzs\\tw\[0-9\]+, d\[0-9\]+" } } */
+/* { dg-final { scan-assembler "scvtf\\ts\[0-9\]+, w\[0-9\]+" } } */
+/* { dg-final { scan-assembler "fcvtzs\\tw\[0-9\]+, s\[0-9\]+" } } */
+/* { dg-final { scan-assembler "scvtf\\td\[0-9\]+, w\[0-9\]+" } } */