arm64: tegra: Add PWM nodes on Tegra186
authorThierry Reding <treding@nvidia.com>
Thu, 12 Aug 2021 12:26:16 +0000 (14:26 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 12 Aug 2021 13:07:19 +0000 (15:07 +0200)
These PWMs can be used for fan or LED backlight control. Add the device
tree nodes for all existing controllers found on Tegra186 SoCs. None of
these are enabled by default, which is left for the board DTS files to
do when necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi

index d02f6bf3e2ca7182487643ef42d1324bc275492f..5ac8424555695653ae90d962330e67d6063cc776 100644 (file)
                status = "disabled";
        };
 
+       pwm1: pwm@3280000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x3280000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM1>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM1>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm2: pwm@3290000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x3290000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM2>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM2>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm3: pwm@32a0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32a0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM3>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM3>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm5: pwm@32c0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32c0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM5>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM5>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm6: pwm@32d0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32d0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM6>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM6>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm7: pwm@32e0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32e0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM7>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM7>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm8: pwm@32f0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32f0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM8>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM8>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
        sdmmc1: mmc@3400000 {
                compatible = "nvidia,tegra186-sdhci";
                reg = <0x0 0x03400000 0x0 0x10000>;
                #interrupt-cells = <2>;
        };
 
+       pwm4: pwm@c340000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0xc340000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM4>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM4>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
        pmc: pmc@c360000 {
                compatible = "nvidia,tegra186-pmc";
                reg = <0 0x0c360000 0 0x10000>,