PIPE_CONTROL_TILE_CACHE_FLUSH |
(devinfo->verx10 == 120 ?
PIPE_CONTROL_DEPTH_STALL : 0) |
+ (devinfo->verx10 == 125 ?
+ PIPE_CONTROL_FLUSH_HDC : 0) |
PIPE_CONTROL_PSS_STALL_SYNC);
iris_batch_sync_region_start(batch);
ANV_PIPE_TILE_CACHE_FLUSH_BIT |
(devinfo->verx10 == 120 ?
ANV_PIPE_DEPTH_STALL_BIT : 0) |
+ (devinfo->verx10 == 125 ?
+ ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0) |
ANV_PIPE_PSS_STALL_SYNC_BIT |
ANV_PIPE_END_OF_PIPE_SYNC_BIT,
"before fast clear mcs");
ANV_PIPE_TILE_CACHE_FLUSH_BIT |
(devinfo->verx10 == 120 ?
ANV_PIPE_DEPTH_STALL_BIT : 0) |
+ (devinfo->verx10 == 125 ?
+ ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0) |
ANV_PIPE_PSS_STALL_SYNC_BIT |
ANV_PIPE_END_OF_PIPE_SYNC_BIT,
"before fast clear ccs");