driver:watchdog:Add config definition to different uses of board level
authorxingyu.wu <xingyu.wu@starfivetech.com>
Tue, 19 Apr 2022 13:27:13 +0000 (21:27 +0800)
committerAndy Hu <andy.hu@starfivetech.com>
Tue, 19 Apr 2022 15:54:47 +0000 (23:54 +0800)
1. The watchdog driver can get different rate from clock by different board.
2. arch:riscv:Kconfig: Adjust the format.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
arch/riscv/Kconfig.socs
drivers/watchdog/starfive-wdt.c

index 741303e38670d76d05bfe863096eff917b7da51b..cb87acd282c3032d66965087884fbd95f50d410c 100755 (executable)
@@ -96,26 +96,26 @@ config USB_CDNS3_HOST_FLUSH_DMA
 endmenu
 
 choice
-        prompt "StarFive JH SOCs board type"
-        depends on SOC_STARFIVE
-       default STARFIVE_FPGA
+       prompt "StarFive JH SOCs board type"
+       depends on SOC_STARFIVE
+       default STARFIVE_BOARD_FPGA
        help
-          choice StarFive JH7110 SOC board type
+               choice StarFive JH7110 SOC board type
 
-        config STARFIVE_BOARD_FPGA
-                bool "FPGA"
-                help
-                  This enables support for StarFive SoC FPGA board type Hardware.
+       config STARFIVE_BOARD_FPGA
+               bool "FPGA"
+               help
+                       This enables support for StarFive SoC FPGA board type Hardware.
 
-        config STARFIVE_BOARD_EVB
-                bool "EVB"
-                help
-                  This enables support for StarFive SoC EVB board type Hardware.
+       config STARFIVE_BOARD_EVB
+               bool "EVB"
+               help
+                       This enables support for StarFive SoC EVB board type Hardware.
 
        config STARFIVE_BOARD_VISIONFIVE
-                bool "Visionfive"
-                help
-                  This enables support for StarFive SoC Visionfive board type Hardware.
+               bool "Visionfive"
+               help
+                       This enables support for StarFive SoC Visionfive board type Hardware.
 endchoice
 
 config SOC_VIRT
index 26b79ada9b9ad29540644997e06fee32c3d9c4fc..d05a6683aa8bc5f5ea56dab0571e34f04c969755 100755 (executable)
@@ -200,14 +200,10 @@ MODULE_DEVICE_TABLE(platform, si5wdt_ids);
 
 static int si5wdt_get_clock_rate(struct stf_si5_wdt *wdt)
 {
+#ifdef CONFIG_STARFIVE_BOARD_FPGA
        int ret;
        u32 freq;
 
-       if (!IS_ERR(wdt->core_clk)) {
-               wdt->freq = clk_get_rate(wdt->core_clk);
-               return 0;
-       }
-
        /* Next we try to get clock-frequency from dts.*/
        ret = of_property_read_u32(wdt->dev->of_node, "clock-frequency", &freq);
        if (!ret) {
@@ -216,6 +212,12 @@ static int si5wdt_get_clock_rate(struct stf_si5_wdt *wdt)
        }
        else
                dev_err(wdt->dev, "get rate failed, need clock-frequency define in dts.\n");
+#else
+       if (!IS_ERR(wdt->core_clk)) {
+               wdt->freq = clk_get_rate(wdt->core_clk);
+               return 0;
+       }
+#endif
 
        return -ENOENT;
 }