arm64: dts: ls1028a: Update #clock-cells of dpclk node
authorWen He <wen.he_1@nxp.com>
Mon, 14 Oct 2019 07:13:27 +0000 (15:13 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 28 Oct 2019 13:48:02 +0000 (21:48 +0800)
Update the property #clock-cells = <1> to #clock-cells = <0> of the
dpclk, since the Display output pixel clock driver provides single
clock output.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

index 51fa8f5..616b150 100644 (file)
@@ -82,7 +82,7 @@
        dpclk: clock-controller@f1f0000 {
                compatible = "fsl,ls1028a-plldig";
                reg = <0x0 0xf1f0000 0x0 0xffff>;
-               #clock-cells = <1>;
+               #clock-cells = <0>;
                clocks = <&osc_27m>;
        };
 
                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                             <0 223 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "DE", "SE";
-               clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>,
+               clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,
                         <&clockgen 2 2>;
                clock-names = "pxlclk", "mclk", "aclk", "pclk";
                arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;