/* Output routines for Motorola MCore processor
- Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
Free Software Foundation, Inc.
This file is part of GCC.
static void output_stack_adjust (int, int);
static int calc_live_regs (int *);
-static int try_constant_tricks (long, int *, int *);
+static int try_constant_tricks (long, HOST_WIDE_INT *, HOST_WIDE_INT *);
static const char * output_inline_const (enum machine_mode, rtx *);
static void layout_mcore_frame (struct mcore_frame *);
static void mcore_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x) + 1));
break;
case 'P':
- fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x)));
+ fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x) & 0xffffffff));
break;
case 'Q':
fprintf (asm_out_file, "%d", exact_log2 (~INTVAL (x)));
static int
mcore_const_costs (rtx exp, enum rtx_code code)
{
- int val = INTVAL (exp);
+ HOST_WIDE_INT val = INTVAL (exp);
/* Easy constants. */
if ( CONST_OK_FOR_I (val)
static int
mcore_and_cost (rtx x)
{
- int val;
+ HOST_WIDE_INT val;
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
return 2;
static int
mcore_ior_cost (rtx x)
{
- int val;
+ HOST_WIDE_INT val;
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
return 2;
if (GET_CODE (op1) == CONST_INT)
{
- int val = INTVAL (op1);
+ HOST_WIDE_INT val = INTVAL (op1);
switch (code)
{
/* Can we load a constant with a single instruction ? */
int
-const_ok_for_mcore (int value)
+const_ok_for_mcore (HOST_WIDE_INT value)
{
if (value >= 0 && value <= 127)
return 1;
/* Try exact power of two. */
- if ((value & (value - 1)) == 0)
+ if (CONST_OK_FOR_M (value))
return 1;
/* Try exact power of two - 1. */
- if ((value & (value + 1)) == 0)
+ if (CONST_OK_FOR_N (value) && value != -1)
return 1;
return 0;
/* Can we load a constant inline with up to 2 instructions ? */
int
-mcore_const_ok_for_inline (long value)
+mcore_const_ok_for_inline (HOST_WIDE_INT value)
{
- int x, y;
+ HOST_WIDE_INT x, y;
return try_constant_tricks (value, & x, & y) > 0;
}
/* Are we loading the constant using a not ? */
int
-mcore_const_trick_uses_not (long value)
+mcore_const_trick_uses_not (HOST_WIDE_INT value)
{
- int x, y;
+ HOST_WIDE_INT x, y;
return try_constant_tricks (value, & x, & y) == 2;
}
11: single insn followed by ixw. */
static int
-try_constant_tricks (long value, int * x, int * y)
+try_constant_tricks (HOST_WIDE_INT value, HOST_WIDE_INT * x, HOST_WIDE_INT * y)
{
- int i;
- unsigned bit, shf, rot;
+ HOST_WIDE_INT i;
+ unsigned HOST_WIDE_INT bit, shf, rot;
if (const_ok_for_mcore (value))
return 1; /* Do the usual thing. */
- if (TARGET_HARDLIT)
+ if (! TARGET_HARDLIT)
+ return 0;
+
+ if (const_ok_for_mcore (~value))
+ {
+ *x = ~value;
+ return 2;
+ }
+
+ for (i = 1; i <= 32; i++)
{
- if (const_ok_for_mcore (~value))
+ if (const_ok_for_mcore (value - i))
{
- *x = ~value;
- return 2;
+ *x = value - i;
+ *y = i;
+
+ return 3;
}
-
- for (i = 1; i <= 32; i++)
+
+ if (const_ok_for_mcore (value + i))
{
- if (const_ok_for_mcore (value - i))
- {
- *x = value - i;
- *y = i;
-
- return 3;
- }
-
- if (const_ok_for_mcore (value + i))
- {
- *x = value + i;
- *y = i;
-
- return 4;
- }
+ *x = value + i;
+ *y = i;
+
+ return 4;
}
-
- bit = 0x80000000L;
-
- for (i = 0; i <= 31; i++)
+ }
+
+ bit = 0x80000000ULL;
+
+ for (i = 0; i <= 31; i++)
+ {
+ if (const_ok_for_mcore (i - value))
{
- if (const_ok_for_mcore (i - value))
- {
- *x = i - value;
- *y = i;
-
- return 5;
- }
-
- if (const_ok_for_mcore (value & ~bit))
- {
- *y = bit;
- *x = value & ~bit;
-
- return 6;
- }
-
- if (const_ok_for_mcore (value | bit))
- {
- *y = ~bit;
- *x = value | bit;
-
- return 7;
- }
-
- bit >>= 1;
+ *x = i - value;
+ *y = i;
+
+ return 5;
}
-
- shf = value;
- rot = value;
-
- for (i = 1; i < 31; i++)
+
+ if (const_ok_for_mcore (value & ~bit))
{
- int c;
-
- /* MCore has rotate left. */
- c = rot << 31;
- rot >>= 1;
- rot &= 0x7FFFFFFF;
- rot |= c; /* Simulate rotate. */
-
- if (const_ok_for_mcore (rot))
- {
- *y = i;
- *x = rot;
-
- return 8;
- }
-
- if (shf & 1)
- shf = 0; /* Can't use logical shift, low order bit is one. */
-
- shf >>= 1;
-
- if (shf != 0 && const_ok_for_mcore (shf))
- {
- *y = i;
- *x = shf;
-
- return 9;
- }
+ *y = bit;
+ *x = value & ~bit;
+ return 6;
}
-
- if ((value % 3) == 0 && const_ok_for_mcore (value / 3))
+
+ if (const_ok_for_mcore (value | bit))
{
- *x = value / 3;
-
- return 10;
+ *y = ~bit;
+ *x = value | bit;
+
+ return 7;
}
-
- if ((value % 5) == 0 && const_ok_for_mcore (value / 5))
+
+ bit >>= 1;
+ }
+
+ shf = value;
+ rot = value;
+
+ for (i = 1; i < 31; i++)
+ {
+ int c;
+
+ /* MCore has rotate left. */
+ c = rot << 31;
+ rot >>= 1;
+ rot &= 0x7FFFFFFF;
+ rot |= c; /* Simulate rotate. */
+
+ if (const_ok_for_mcore (rot))
{
- *x = value / 5;
-
- return 11;
+ *y = i;
+ *x = rot;
+
+ return 8;
+ }
+
+ if (shf & 1)
+ shf = 0; /* Can't use logical shift, low order bit is one. */
+
+ shf >>= 1;
+
+ if (shf != 0 && const_ok_for_mcore (shf))
+ {
+ *y = i;
+ *x = shf;
+
+ return 9;
}
}
+
+ if ((value % 3) == 0 && const_ok_for_mcore (value / 3))
+ {
+ *x = value / 3;
+
+ return 10;
+ }
+
+ if ((value % 5) == 0 && const_ok_for_mcore (value / 5))
+ {
+ *x = value / 5;
+
+ return 11;
+ }
return 0;
}
/* Count the number of ones in mask. */
int
-mcore_num_ones (int mask)
+mcore_num_ones (HOST_WIDE_INT mask)
{
/* A trick to count set bits recently posted on comp.compilers. */
mask = (mask >> 1 & 0x55555555) + (mask & 0x55555555);
/* Count the number of zeros in mask. */
int
-mcore_num_zeros (int mask)
+mcore_num_zeros (HOST_WIDE_INT mask)
{
return 32 - mcore_num_ones (mask);
}
const char *
mcore_output_cmov (rtx operands[], int cmp_t, const char * test)
{
- int load_value;
- int adjust_value;
+ HOST_WIDE_INT load_value;
+ HOST_WIDE_INT adjust_value;
rtx out_operands[4];
out_operands[0] = operands[0];
instruction sequence has a different length attribute). */
if (load_value >= 0 && load_value <= 127)
output_asm_insn ("movi\t%0,%1", out_operands);
- else if ((load_value & (load_value - 1)) == 0)
+ else if (CONST_OK_FOR_M (load_value))
output_asm_insn ("bgeni\t%0,%P1", out_operands);
- else if ((load_value & (load_value + 1)) == 0)
+ else if (CONST_OK_FOR_N (load_value))
output_asm_insn ("bmaski\t%0,%N1", out_operands);
/* Output the constant adjustment. */
const char *
mcore_output_andn (rtx insn ATTRIBUTE_UNUSED, rtx operands[])
{
- int x, y;
+ HOST_WIDE_INT x, y;
rtx out_operands[3];
const char * load_op;
char buf[256];
gcc_assert (trick_no == 2);
out_operands[0] = operands[0];
- out_operands[1] = GEN_INT(x);
+ out_operands[1] = GEN_INT (x);
out_operands[2] = operands[2];
if (x >= 0 && x <= 127)
load_op = "movi\t%0,%1";
/* Try exact power of two. */
- else if ((x & (x - 1)) == 0)
+ else if (CONST_OK_FOR_M (x))
load_op = "bgeni\t%0,%P1";
/* Try exact power of two - 1. */
- else if ((x & (x + 1)) == 0)
+ else if (CONST_OK_FOR_N (x))
load_op = "bmaski\t%0,%N1";
- else
- load_op = "BADMOVI\t%0,%1";
+ else
+ {
+ load_op = "BADMOVI-andn\t%0, %1";
+ gcc_unreachable ();
+ }
sprintf (buf, "%s\n\tandn\t%%2,%%0", load_op);
output_asm_insn (buf, out_operands);
static const char *
output_inline_const (enum machine_mode mode, rtx operands[])
{
- int x = 0, y = 0;
+ HOST_WIDE_INT x = 0, y = 0;
int trick_no;
rtx out_operands[3];
char buf[256];
char load_op[256];
const char *dst_fmt;
- int value;
+ HOST_WIDE_INT value;
value = INTVAL (operands[1]);
sprintf (load_op, "movi\t%s,%%1", dst_fmt);
/* Try exact power of two. */
- else if ((x & (x - 1)) == 0)
+ else if (CONST_OK_FOR_M (x))
sprintf (load_op, "bgeni\t%s,%%P1", dst_fmt);
/* Try exact power of two - 1. */
- else if ((x & (x + 1)) == 0)
+ else if (CONST_OK_FOR_N (x))
sprintf (load_op, "bmaski\t%s,%%N1", dst_fmt);
- else
- sprintf (load_op, "BADMOVI\t%s,%%1", dst_fmt);
+ else
+ {
+ sprintf (load_op, "BADMOVI-inline_const %s, %%1", dst_fmt);
+ gcc_unreachable ();
+ }
switch (trick_no)
{
strcpy (buf, load_op);
break;
case 2: /* not */
- sprintf (buf, "%s\n\tnot\t%s\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\tnot\t%s\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 3: /* add */
- sprintf (buf, "%s\n\taddi\t%s,%%2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\taddi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 4: /* sub */
- sprintf (buf, "%s\n\tsubi\t%s,%%2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\tsubi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 5: /* rsub */
/* Never happens unless -mrsubi, see try_constant_tricks(). */
- sprintf (buf, "%s\n\trsubi\t%s,%%2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\trsubi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
- case 6: /* bset */
- sprintf (buf, "%s\n\tbseti\t%s,%%P2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ case 6: /* bseti */
+ sprintf (buf, "%s\n\tbseti\t%s,%%P2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 7: /* bclr */
- sprintf (buf, "%s\n\tbclri\t%s,%%Q2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\tbclri\t%s,%%Q2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 8: /* rotl */
- sprintf (buf, "%s\n\trotli\t%s,%%2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\trotli\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 9: /* lsl */
- sprintf (buf, "%s\n\tlsli\t%s,%%2\t// %d 0x%x", load_op, dst_fmt, value, value);
+ sprintf (buf, "%s\n\tlsli\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
break;
case 10: /* ixh */
- sprintf (buf, "%s\n\tixh\t%s,%s\t// %d 0x%x", load_op, dst_fmt, dst_fmt, value, value);
+ sprintf (buf, "%s\n\tixh\t%s,%s\t// %ld 0x%lx", load_op, dst_fmt, dst_fmt, value, value);
break;
case 11: /* ixw */
- sprintf (buf, "%s\n\tixw\t%s,%s\t// %d 0x%x", load_op, dst_fmt, dst_fmt, value, value);
+ sprintf (buf, "%s\n\tixw\t%s,%s\t// %ld 0x%lx", load_op, dst_fmt, dst_fmt, value, value);
break;
default:
return "";
}
else if (GET_CODE (src) == CONST_INT)
{
- int x, y;
+ HOST_WIDE_INT x, y;
if (CONST_OK_FOR_I (INTVAL (src))) /* r-I */
return "movi\t%0,%1";
output_asm_insn ("movi %0,%1", operands);
else if (CONST_OK_FOR_M (INTVAL (src)))
output_asm_insn ("bgeni %0,%P1", operands);
- else if (INTVAL (src) == -1)
- output_asm_insn ("bmaski %0,32", operands);
else if (CONST_OK_FOR_N (INTVAL (src)))
output_asm_insn ("bmaski %0,%N1", operands);
else
output_asm_insn ("movi %R0,%1", operands);
else if (CONST_OK_FOR_M (INTVAL (src)))
output_asm_insn ("bgeni %R0,%P1", operands);
- else if (INTVAL (src) == -1)
- output_asm_insn ("bmaski %R0,32", operands);
else if (CONST_OK_FOR_N (INTVAL (src)))
output_asm_insn ("bmaski %R0,%N1", operands);
else
gcc_unreachable ();
-
+
if (INTVAL (src) < 0)
return "bmaski %0,32";
else
{
/* Do directly with bseti or bclri. */
/* RBE: 2/97 consider only low bit of constant. */
- if ((INTVAL(operands[3])&1) == 0)
+ if ((INTVAL (operands[3]) & 1) == 0)
{
mask = ~(1 << posn);
emit_insn (gen_rtx_SET (SImode, operands[0],
immediates. */
/* If setting the entire field, do it directly. */
- if (GET_CODE (operands[3]) == CONST_INT &&
- INTVAL (operands[3]) == ((1 << width) - 1))
+ if (GET_CODE (operands[3]) == CONST_INT
+ && INTVAL (operands[3]) == ((1 << width) - 1))
{
mreg = force_reg (SImode, GEN_INT (INTVAL (operands[3]) << posn));
emit_insn (gen_rtx_SET (SImode, operands[0],
/* Definitions of target machine for GNU compiler,
for Motorola M*CORE Processor.
- Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
Free Software Foundation, Inc.
This file is part of GCC.
U: constant 0
xxxS: 1 cleared bit out of 32 (complement of power of 2). for bclri
xxxT: 2 cleared bits out of 32. for pairs of bclris. */
-#define CONST_OK_FOR_I(VALUE) (((int)(VALUE)) >= 0 && ((int)(VALUE)) <= 0x7f)
-#define CONST_OK_FOR_J(VALUE) (((int)(VALUE)) > 0 && ((int)(VALUE)) <= 32)
-#define CONST_OK_FOR_L(VALUE) (((int)(VALUE)) < 0 && ((int)(VALUE)) >= -32)
-#define CONST_OK_FOR_K(VALUE) (((int)(VALUE)) >= 0 && ((int)(VALUE)) <= 31)
-#define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0)
-#define CONST_OK_FOR_N(VALUE) (((int)(VALUE)) == -1 || exact_log2 ((VALUE) + 1) >= 0)
+#define CONST_OK_FOR_I(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 0x7f)
+#define CONST_OK_FOR_J(VALUE) (((HOST_WIDE_INT)(VALUE)) > 0 && ((HOST_WIDE_INT)(VALUE)) <= 32)
+#define CONST_OK_FOR_L(VALUE) (((HOST_WIDE_INT)(VALUE)) < 0 && ((HOST_WIDE_INT)(VALUE)) >= -32)
+#define CONST_OK_FOR_K(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 31)
+#define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0 && exact_log2 (VALUE) <= 30)
+#define CONST_OK_FOR_N(VALUE) (((HOST_WIDE_INT)(VALUE)) == -1 || (exact_log2 ((VALUE) + 1) >= 0 && exact_log2 ((VALUE) + 1) <= 30))
#define CONST_OK_FOR_O(VALUE) (CONST_OK_FOR_I(VALUE) || \
CONST_OK_FOR_M(VALUE) || \
CONST_OK_FOR_N(VALUE) || \
- CONST_OK_FOR_M((int)(VALUE) - 1) || \
- CONST_OK_FOR_N((int)(VALUE) + 1))
+ CONST_OK_FOR_M((HOST_WIDE_INT)(VALUE) - 1) || \
+ CONST_OK_FOR_N((HOST_WIDE_INT)(VALUE) + 1))
#define CONST_OK_FOR_P(VALUE) (mcore_const_ok_for_inline (VALUE))
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
On the MCore, allow anything but a double. */
-#define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE)
+#define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE \
+ && CONSTANT_P (X))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
if (GET_CODE (OP) == CONST_INT) \
{ \
if (GET_MODE_SIZE (MODE) >= 4 \
- && (((unsigned)INTVAL (OP)) % 4) == 0 \
- && ((unsigned)INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \
+ && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \
+ && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \
goto LABEL; \
if (GET_MODE_SIZE (MODE) == 2 \
- && (((unsigned)INTVAL (OP)) % 2) == 0 \
- && ((unsigned)INTVAL (OP)) <= 30) \
+ && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \
+ && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \
goto LABEL; \
if (GET_MODE_SIZE (MODE) == 1 \
- && ((unsigned)INTVAL (OP)) <= 15) \
+ && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 15) \
goto LABEL; \
} \
} \
#define DATA_SECTION_ASM_OP "\t.data"
/* Switch into a generic section. */
-#undef TARGET_ASM_NAMED_SECTION
+#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION mcore_asm_named_section
/* This is how to output an insn to push a register on the stack.
;; Machine description the Motorola MCore
-;; Copyright (C) 1993, 1999, 2000, 2004, 2005
+;; Copyright (C) 1993, 1999, 2000, 2004, 2005, 2007
;; Free Software Foundation, Inc.
;; Contributed by Motorola.
(define_split
[(parallel[
(set (reg:CC 17)
- (ne:CC (ne:SI (leu:CC (match_operand:SI 0 "mcore_arith_reg_operand" "r")
- (match_operand:SI 1 "mcore_arith_reg_operand" "r"))
+ (ne:CC (ne:SI (leu:CC (match_operand:SI 0 "mcore_arith_reg_operand" "")
+ (match_operand:SI 1 "mcore_arith_reg_operand" ""))
(const_int 0))
(const_int 0)))
- (clobber (match_operand:CC 2 "mcore_arith_reg_operand" "=r"))])]
+ (clobber (match_operand:CC 2 "mcore_arith_reg_operand" ""))])]
""
[(set (reg:CC 17) (ne:SI (match_dup 0) (const_int 0)))
(set (reg:CC 17) (leu:CC (match_dup 0) (match_dup 1)))])
if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0
&& ! mcore_arith_S_operand (operands[2]))
{
- int not_value = ~ INTVAL (operands[2]);
+ HOST_WIDE_INT not_value = ~ INTVAL (operands[2]);
+
if ( CONST_OK_FOR_I (not_value)
|| CONST_OK_FOR_M (not_value)
|| CONST_OK_FOR_N (not_value))
/* Convert adds to subtracts if this makes loading the constant cheaper.
But only if we are allowed to generate new pseudos. */
if (! (reload_in_progress || reload_completed)
- && GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < -32)
+ && GET_CODE (operands[2]) == CONST_INT
+ && INTVAL (operands[2]) < -32)
{
- int neg_value = - INTVAL (operands[2]);
+ HOST_WIDE_INT neg_value = - INTVAL (operands[2]);
+
if ( CONST_OK_FOR_I (neg_value)
|| CONST_OK_FOR_M (neg_value)
|| CONST_OK_FOR_N (neg_value))
;; || (INTVAL (operands[2]) < -32 && INTVAL(operands[2]) >= -64))"
;; "*
;; {
-;; int n = INTVAL(operands[2]);
+;; HOST_WIDE_INT n = INTVAL(operands[2]);
;; if (n > 0)
;; {
;; operands[2] = GEN_INT(n - 32);
;; || (INTVAL (operands[2]) < -32 && INTVAL(operands[2]) >= -64))"
;; "*
;; {
-;; int n = INTVAL(operands[2]);
+;; HOST_WIDE_INT n = INTVAL(operands[2]);
;; if ( n > 0)
;; {
;; operands[2] = GEN_INT( n - 32);
(match_operand:SI 1 "const_int_operand" ""))
(set (match_operand:SI 2 "mcore_arith_reg_operand" "")
(ior:SI (match_dup 2) (match_dup 0)))]
- "TARGET_HARDLIT && mcore_num_ones (INTVAL (operands[1])) == 2 &&
- mcore_is_dead (insn, operands[0])"
+ "TARGET_HARDLIT
+ && mcore_num_ones (INTVAL (operands[1])) == 2
+ && mcore_is_dead (insn, operands[0])"
"* return mcore_output_bseti (operands[2], INTVAL (operands[1]));")
(define_peephole
if (GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) < 8 * STACK_UNITS_MAXSTEP)
{
- int left = INTVAL(operands[1]);
+ HOST_WIDE_INT left = INTVAL(operands[1]);
/* If it's a long way, get close enough for a last shot. */
if (left >= STACK_UNITS_MAXSTEP)
while (left > STACK_UNITS_MAXSTEP);
}
/* Perform the final adjustment. */
- emit_insn (gen_addsi3 (stack_pointer_rtx,stack_pointer_rtx,GEN_INT(-left)));
+ emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, GEN_INT (-left)));
;; emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
DONE;
}
#if 1
emit_insn (gen_movsi (tmp, operands[1]));
- emit_insn (gen_movsi (step, GEN_INT(STACK_UNITS_MAXSTEP)));
+ emit_insn (gen_movsi (step, GEN_INT (STACK_UNITS_MAXSTEP)));
if (GET_CODE (operands[1]) != CONST_INT)
{