assert(ImmOp.isImm() && "expected immediate operand kind");
const MCOperand &MemOffsetOp = Inst.getOperand(2);
- assert(MemOffsetOp.isImm() && "expected immediate operand kind");
+ assert((MemOffsetOp.isImm() || MemOffsetOp.isExpr()) &&
+ "expected immediate or expression operand");
unsigned OpCode = 0;
switch(Inst.getOpcode()) {
# CHECK-LE: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
# CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00]
+ beq $2, 65538, foo
+# CHECK-LE: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
+# CHECK-LE: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34]
+# CHECK-LE: beq $2, $1, foo # encoding: [A,A,0x41,0x10]
+# CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00]
+
# Test ULH with immediate operand.
ulh_imm: # CHECK-LABEL: ulh_imm:
ulh $8, 0
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# Test one with a symbol in the third operand.
+sym:
+ bne $2, 0x100010001, sym
+# CHECK: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
+# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
+# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
+# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
+# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
+# CHECK: bne $2, $1, sym # encoding: [A,A,0x41,0x14]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+
# Test ulhu with 64-bit immediate addresses.
ulhu $8, 0x100010001
# CHECK: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]