addExpr(Inst, getImm());
}
};
-} // end anonymous namespace
+} // end namespace
#define GET_REGISTER_MATCHER
#define GET_SUBTARGET_FEATURE_NAME
ArrayRef<uint8_t> Bytes, uint64_t Address,
raw_ostream &CStream) const override;
};
-} // end anonymous namespace
+} // end namespace
static MCDisassembler *createLoongArchDisassembler(const Target &T,
const MCSubtargetInfo &STI,
const AsmPrinter &AP);
FunctionPass *createLoongArchISelDag(LoongArchTargetMachine &TM);
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCH_H
const DebugLoc &DL, Register DestReg, Register SrcReg,
int64_t Val, MachineInstr::MIFlag Flag) const;
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHFRAMELOWERING_H
#include "LoongArchGenDAGISel.inc"
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
BSTRPICK,
};
-} // namespace LoongArchISD
+} // end namespace LoongArchISD
class LoongArchTargetLowering : public TargetLowering {
const LoongArchSubtarget &Subtarget;
Register getFrameRegister(const MachineFunction &MF) const override;
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHREGISTERINFO_H
unsigned getGRLen() const { return GRLen; }
LoongArchABI::ABI getTargetABI() const { return TargetABI; }
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHSUBTARGET_H
void addIRPasses() override;
bool addInstSelector() override;
};
-} // namespace
+} // end namespace
TargetPassConfig *
LoongArchTargetMachine::createPassConfig(PassManagerBase &PM) {
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHASMBACKEND_H
// FIXME: other register?
MCRegister getBPReg() { return LoongArch::R31; }
-} // namespace LoongArchABI
+} // end namespace LoongArchABI
-} // namespace llvm
+} // end namespace llvm
// Returns the register used to hold the stack pointer after realignment.
MCRegister getBPReg();
-} // namespace LoongArchABI
+} // end namespace LoongArchABI
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHBASEINFO_H
unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup, bool IsPCRel) const override;
};
-} // namespace
+} // end namespace
LoongArchELFObjectWriter::LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit)
: MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_LOONGARCH,
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O);
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHINSTPRINTER_H
explicit LoongArchMCAsmInfo(const Triple &TargetTriple);
};
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHMCASMINFO_H
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
};
-} // end anonymous namespace
+} // end namespace
unsigned
LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
}
};
-} // end anonymous namespace
+} // end namespace
static MCInstrAnalysis *createLoongArchInstrAnalysis(const MCInstrInfo *Info) {
return new LoongArchMCInstrAnalysis(Info);
std::unique_ptr<MCObjectTargetWriter>
createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit);
-} // namespace llvm
+} // end namespace llvm
// Defines symbolic names for LoongArch registers.
#define GET_REGINFO_ENUM
// Helper to generate an instruction sequence that will materialise the given
// immediate value into a register.
InstSeq generateInstSeq(int64_t Val);
-} // namespace LoongArchMatInt
-} // namespace llvm
+} // end namespace LoongArchMatInt
+} // end namespace llvm
#endif
Target &getTheLoongArch32Target();
Target &getTheLoongArch64Target();
-} // namespace llvm
+} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_TARGETINFO_LOONGARCHTARGETINFO_H