return 0;
}
+static void vc4_hdmi_reset(struct vc4_hdmi *vc4_hdmi)
+{
+ HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_SW_RST);
+ udelay(1);
+ HDMI_WRITE(HDMI_M_CTL, 0);
+
+ HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_ENABLE);
+
+ HDMI_WRITE(HDMI_SW_RESET_CONTROL,
+ VC4_HDMI_SW_RESET_HDMI |
+ VC4_HDMI_SW_RESET_FORMAT_DETECT);
+
+ HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
+}
+
static enum drm_connector_status
vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
{
return;
}
- HDMI_WRITE(HDMI_SW_RESET_CONTROL,
- VC4_HDMI_SW_RESET_HDMI |
- VC4_HDMI_SW_RESET_FORMAT_DETECT);
-
- HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
+ if (vc4_hdmi->variant->reset)
+ vc4_hdmi->variant->reset(vc4_hdmi);
/* PHY should be in reset, like
* vc4_hdmi_encoder_disable() does.
vc4_hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;
}
- /* HDMI core must be enabled. */
- if (!(HDMI_READ(HDMI_M_CTL) & VC4_HD_M_ENABLE)) {
- HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_SW_RST);
- udelay(1);
- HDMI_WRITE(HDMI_M_CTL, 0);
-
- HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_ENABLE);
- }
pm_runtime_enable(dev);
drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
.num_registers = ARRAY_SIZE(vc4_hdmi_fields),
.init_resources = vc4_hdmi_init_resources,
+ .reset = vc4_hdmi_reset,
};
static const struct of_device_id vc4_hdmi_dt_match[] = {