drm/amd/display: Clean up code in dc

[Why & How]
Code clean up in dc.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index e41a48f596a31289911973549023679b5989ff2e..f1444940118820541bac28a34c5c4b6b8965e288 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2901,14 +2901,15 @@ static void commit_planes_for_stream(struct dc *dc,
                                                top_pipe_to_program->stream_res.tg);
                }
 
-       if (should_lock_all_pipes && dc->hwss.interdependent_update_lock)
+       if (should_lock_all_pipes && dc->hwss.interdependent_update_lock) {
                dc->hwss.interdependent_update_lock(dc, context, true);
-       else
+       } else {
                /* Lock the top pipe while updating plane addrs, since freesync requires
                 *  plane addr update event triggers to be synchronized.
                 *  top_pipe_to_program is expected to never be NULL
                 */
                dc->hwss.pipe_control_lock(dc, top_pipe_to_program, true);
+       }
 
        // Stream updates
        if (stream_update)
@@ -2924,10 +2925,11 @@ static void commit_planes_for_stream(struct dc *dc,
                if (dc->hwss.program_front_end_for_ctx)
                        dc->hwss.program_front_end_for_ctx(dc, context);
 
-               if (should_lock_all_pipes && dc->hwss.interdependent_update_lock)
+               if (should_lock_all_pipes && dc->hwss.interdependent_update_lock) {
                        dc->hwss.interdependent_update_lock(dc, context, false);
-               else
+               } else {
                        dc->hwss.pipe_control_lock(dc, top_pipe_to_program, false);
+               }
                dc->hwss.post_unlock_program_front_end(dc, context);
                return;
        }
@@ -3052,10 +3054,11 @@ static void commit_planes_for_stream(struct dc *dc,
 
        }
 
-       if (should_lock_all_pipes && dc->hwss.interdependent_update_lock)
+       if (should_lock_all_pipes && dc->hwss.interdependent_update_lock) {
                dc->hwss.interdependent_update_lock(dc, context, false);
-       else
+       } else {
                dc->hwss.pipe_control_lock(dc, top_pipe_to_program, false);
+       }
 
        if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)
                if (top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) {

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index e1f87bd72e4a8ca9afa627e78f4bac7bd1eac060..0da024912dbec76ac494f1195c0e9b4a1e25b808 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1773,7 +1773,6 @@ void dcn20_post_unlock_program_front_end(
         */
        for (i = 0; i < dc->res_pool->pipe_count; i++) {
                struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
-
                if (pipe->plane_state && !pipe->top_pipe && pipe->update_flags.bits.enable) {
                        struct hubp *hubp = pipe->plane_res.hubp;
                        int j = 0;