Merge tag 'amd-drm-next-6.5-2023-06-09' of https://gitlab.freedesktop.org/agd5f/linux...

amd-drm-next-6.5-2023-06-02:

amdgpu:
- SR-IOV fixes
- Warning fixes
- Misc code cleanups and spelling fixes
- DCN 3.2 updates
- Improved DC FAMS support for better power management
- Improved DC SubVP support for better power management
- DCN 3.1.x fixes
- Max IB size query
- DC GPU reset fixes
- RAS updates
- DCN 3.0.x fixes
- S/G display fixes
- CP shadow buffer support
- Implement connector force callback
- Z8 power improvements
- PSP 13.0.10 vbflash support
- Mode2 reset fixes
- Store MQDs in VRAM to improve queue switch latency
- VCN 3.x fixes
- JPEG 3.x fixes
- Enable DC_FP on LoongArch
- GFXOFF fixes
- GC 9.4.3 partition support
- SDMA 4.4.2 partition support
- VCN/JPEG 4.0.3 partition support
- VCN 4.0.3 updates
- NBIO 7.9 updates
- GC 9.4.3 updates
- Take NUMA into account when allocating memory
- Handle NUMA for partitions
- SMU 13.0.6 updates
- GC 9.4.3 RAS updates
- Stop including unused swiotlb.h
- SMU 13.0.7 fixes
- Fix clock output ordering on some APUs
- Clean up DC FPGA code
- GFX9 preemption fixes
- Misc irq fixes
- S0ix fixes
- Add new DRM_AMDGPU_WERROR config parameter to help with CI
- PCIe fix for RDNA2
- kdoc fixes
- Documentation updates

amdkfd:
- Query TTM mem limit rather than hardcoding it
- GC 9.4.3 partition support
- Handle NUMA for partitions

radeon:
- Fix possible double free
- Stop including unused swiotlb.h
- Fix possible division by zero

ttm:
- Add query for TTM mem limit
- Add NUMA awareness to pools
- Export ttm_pool_fini()

UAPI:
- Add new ctx query flag to better handle GPU resets
  Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290
- Add new interface to query and set shadow buffer for RDNA3
  Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21986
- Add new INFO query for max IB size
  Proposed userspace: https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3

amd-drm-next-6.5-2023-06-09:

amdgpu:
- S0ix fixes
- Initial SMU13 Overdrive support
- kdoc fixes
- Misc clode cleanups
- Flexible array fixes
- Display OTG fixes
- SMU 13.0.6 updates
- Revert some broken clock counter updates
- Misc display fixes
- GFX9 preemption fixes
- Add support for newer EEPROM bad page table format
- Add missing radeon secondary id
- Add support for new colorspace KMS API
- CSA fix
- Stable pstate fixes for APUs
- make vbl interface admin only
- Handle PCI accelerator class

amdkfd:
- Add debugger support for gdb

radeon:
- Fix possible UAF

drm:
- Add Colorspace functionality

UAPI:
- Add debugger interface for enabling gdb
  Proposed userspace: https://github.com/ROCm-Developer-Tools/ROCdbgapi/tree/wip-dbgapi
- Add KMS colorspace API
  Discussion: https://lists.freedesktop.org/archives/dri-devel/2023-June/408128.html

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230609174817.7764-1-alexander.deucher@amd.com

diff --cc drivers/gpu/drm/Makefile
Simple merge

diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
Simple merge

diff --cc drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
Simple merge

diff --cc drivers/gpu/drm/amd/display/Kconfig
index 2d8e55e,4e99b88..bf0a655
--- 1/drivers/gpu/drm/amd/display/Kconfig
--- 2/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@@ -8,7 -8,7 +8,7 @@@ config DRM_AMD_D
        depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
        select SND_HDA_COMPONENT if SND_HDA_CORE
        # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
-       select DRM_AMD_DC_FP if (X86 || (PPC64 && ALTIVEC) || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
 -      select DRM_AMD_DC_FP if (X86 || LOONGARCH || PPC64 || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
++      select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
        help
          Choose this option if you want to use the new display engine
          support for AMDGPU. This adds required support for Vega and

diff --cc drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
Simple merge

diff --cc drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
Simple merge

diff --cc drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
Simple merge

diff --cc drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 8263a07,b975386..b59e215
--- 1/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
--- 2/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@@ -983,17 -949,8 +949,17 @@@ void dcn30_set_disp_pattern_generator(c
  }
  
  void dcn30_prepare_bandwidth(struct dc *dc,
-       struct dc_state *context)
+                            struct dc_state *context)
  {
 +      bool p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support;
 +      /* Any transition into an FPO config should disable MCLK switching first to avoid
 +       * driver and FW P-State synchronization issues.
 +       */
 +      if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {
 +              dc->optimized_required = true;
 +              context->bw_ctx.bw.dcn.clk.p_state_change_support = false;
 +      }
 +
        if (dc->clk_mgr->dc_mode_softmax_enabled)
                if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 &&
                                context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)

diff --cc drivers/gpu/drm/i915/display/intel_connector.c
Simple merge

diff --cc drivers/gpu/drm/ttm/ttm_device.c
Simple merge

diff --cc drivers/gpu/drm/ttm/ttm_pool.c
index 4db3982,668abf6..cddb915
--- 1/drivers/gpu/drm/ttm/ttm_pool.c
--- 2/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@@ -561,9 -568,9 +563,9 @@@ void ttm_pool_init(struct ttm_pool *poo
        pool->use_dma_alloc = use_dma_alloc;
        pool->use_dma32 = use_dma32;
  
-       if (use_dma_alloc) {
+       if (use_dma_alloc || nid != NUMA_NO_NODE) {
                for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
 -                      for (j = 0; j < TTM_DIM_ORDER; ++j)
 +                      for (j = 0; j <= MAX_ORDER; ++j)
                                ttm_pool_type_init(&pool->caching[i].orders[j],
                                                   pool, i, j);
        }
@@@ -581,9 -589,9 +584,9 @@@ void ttm_pool_fini(struct ttm_pool *poo
  {
        unsigned int i, j;
  
-       if (pool->use_dma_alloc) {
+       if (pool->use_dma_alloc || pool->nid != NUMA_NO_NODE) {
                for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
 -                      for (j = 0; j < TTM_DIM_ORDER; ++j)
 +                      for (j = 0; j <= MAX_ORDER; ++j)
                                ttm_pool_type_fini(&pool->caching[i].orders[j]);
        }
  

diff --cc drivers/gpu/drm/ttm/ttm_tt.c
Simple merge

diff --cc drivers/gpu/drm/vc4/vc4_hdmi.c
Simple merge

diff --cc include/drm/display/drm_dp.h
Simple merge

diff --cc include/drm/drm_connector.h
Simple merge

diff --cc include/drm/ttm/ttm_pool.h
Simple merge

diff --cc include/linux/pci_ids.h
Simple merge