net: ethernet: mtk_eth_soc: remove bridge flow offload type entry support
authorFelix Fietkau <nbd@nbd.name>
Tue, 5 Apr 2022 19:57:54 +0000 (21:57 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 6 Apr 2022 13:08:50 +0000 (14:08 +0100)
According to MediaTek, this feature is not supported in current hardware

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mediatek/mtk_ppe.c
drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c

index a7fe33b..aa0d190 100644 (file)
@@ -84,13 +84,6 @@ static u32 mtk_ppe_hash_entry(struct mtk_foe_entry *e)
        u32 hash;
 
        switch (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, e->ib1)) {
-               case MTK_PPE_PKT_TYPE_BRIDGE:
-                       hv1 = e->bridge.src_mac_lo;
-                       hv1 ^= ((e->bridge.src_mac_hi & 0xffff) << 16);
-                       hv2 = e->bridge.src_mac_hi >> 16;
-                       hv2 ^= e->bridge.dest_mac_lo;
-                       hv3 = e->bridge.dest_mac_hi;
-                       break;
                case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
                case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
                        hv1 = e->ipv4.orig.ports;
@@ -572,7 +565,6 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
              MTK_PPE_FLOW_CFG_IP4_NAT |
              MTK_PPE_FLOW_CFG_IP4_NAPT |
              MTK_PPE_FLOW_CFG_IP4_DSLITE |
-             MTK_PPE_FLOW_CFG_L2_BRIDGE |
              MTK_PPE_FLOW_CFG_IP4_NAT_FRAG;
        ppe_w32(ppe, MTK_PPE_FLOW_CFG, val);
 
index d4b4823..eb0b598 100644 (file)
@@ -32,7 +32,6 @@ static const char *mtk_foe_pkt_type_str(int type)
        static const char * const type_str[] = {
                [MTK_PPE_PKT_TYPE_IPV4_HNAPT] = "IPv4 5T",
                [MTK_PPE_PKT_TYPE_IPV4_ROUTE] = "IPv4 3T",
-               [MTK_PPE_PKT_TYPE_BRIDGE] = "L2",
                [MTK_PPE_PKT_TYPE_IPV4_DSLITE] = "DS-LITE",
                [MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T] = "IPv6 3T",
                [MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T] = "IPv6 5T",