imx: kontron-sl-mx8mm: Use the VSELECT signal to switch SD card IO voltage
authorFrieder Schrempf <frieder.schrempf@kontron.de>
Wed, 24 Aug 2022 13:59:16 +0000 (15:59 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 20 Oct 2022 15:35:51 +0000 (17:35 +0200)
It turns out that it is not necessary to declare the VSELECT signal as
GPIO and let the PMIC driver set it to a fixed high level. This switches
the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
accordingly.

Instead we can do it like other boards already do and simply mux the
VSELECT signal of the USDHC interface to the pin. This makes sure that
the correct voltage is selected by setting the PMIC's SD_VSEL input
to high or low accordingly.

Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi
arch/arm/dts/imx8mm-kontron-bl.dts
arch/arm/dts/imx8mm-kontron-sl.dtsi

index 2c62f05cec199d60c94626a47f6fbee01e284e52..a42881d1a899a0554f7a98d649b89089a38ff11d 100644 (file)
 
 &pinctrl_pmic {
        u-boot,dm-spl;
-       fsl,pins = <
-               MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x141
-               /* Disable Pullup for SD_VSEL */
-               MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4               0x41
-       >;
 };
 
 &pinctrl_uart3 {
index ca533baedcd2e327ec04dad316baabe70ea7a515..a079322a37931ec7726cd6bac4c5eb0e4c7bc64c 100644 (file)
                        MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d0
                        MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d0
                        MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT          0x1d0
                >;
        };
 
                        MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d4
                        MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d4
                        MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT          0x1d0
                >;
        };
 
                        MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d6
                        MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d6
                        MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT          0x1d0
                >;
        };
 };
index 11a50cffc8c4c01663efe019b743a5c1e05e9585..7cfa74734754be4fc723b8a4623a5aa20f6f420f 100644 (file)
                pinctrl-0 = <&pinctrl_pmic>;
                interrupt-parent = <&gpio1>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-               sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 
                regulators {
                        reg_vdd_soc: BUCK1 {
        pinctrl_pmic: pmicgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x141
-                       MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4               0x141
                >;
        };