Small optimisation for bit shift operations

We don't need the right side of the shift operation as uint.
Converting it to int is cheaper and more then enough, as all
but the lowest 5 bits are ignored anyway.

Change-Id: I8833e6cc4e565b8bd1e35a22250e03a9b34938df
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>

diff --git a/src/qml/compiler/qv4isel_masm.cpp b/src/qml/compiler/qv4isel_masm.cpp
index 7df64b3..6fb8393 100644 (file)
--- a/src/qml/compiler/qv4isel_masm.cpp
+++ b/src/qml/compiler/qv4isel_masm.cpp
@@ -2370,20 +2370,20 @@ bool InstructionSelection::int32Binop(V4IR::AluOp oper, V4IR::Expr *leftSource,
             _as->storeInt32(targetReg, target);
     } return true;
     case V4IR::OpLShift:
-        Q_ASSERT(rightSource->type == V4IR::UInt32Type);
+        Q_ASSERT(rightSource->type == V4IR::SInt32Type);
         _as->move(_as->toInt32Register(leftSource, Assembler::ReturnValueRegister),
                   Assembler::ReturnValueRegister);
-        _as->move(_as->toUInt32Register(rightSource, Assembler::ScratchRegister),
+        _as->move(_as->toInt32Register(rightSource, Assembler::ScratchRegister),
                   Assembler::ScratchRegister);
         _as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister); // TODO: for constants, do this in the IR
         _as->lshift32(Assembler::ScratchRegister, Assembler::ReturnValueRegister);
         _as->storeInt32(Assembler::ReturnValueRegister, target);
         return true;
     case V4IR::OpRShift:
-        Q_ASSERT(rightSource->type == V4IR::UInt32Type);
+        Q_ASSERT(rightSource->type == V4IR::SInt32Type);
         _as->move(_as->toInt32Register(leftSource, Assembler::ReturnValueRegister),
                   Assembler::ReturnValueRegister);
-        _as->move(_as->toUInt32Register(rightSource, Assembler::ScratchRegister),
+        _as->move(_as->toInt32Register(rightSource, Assembler::ScratchRegister),
                   Assembler::ScratchRegister);
         _as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister); // TODO: for constants, do this in the IR
         _as->rshift32(Assembler::ScratchRegister, Assembler::ReturnValueRegister);

diff --git a/src/qml/compiler/qv4ssa.cpp b/src/qml/compiler/qv4ssa.cpp
index c41c9cf..ee2607a 100644 (file)
--- a/src/qml/compiler/qv4ssa.cpp
+++ b/src/qml/compiler/qv4ssa.cpp
@@ -1723,12 +1723,12 @@ protected:
         case OpLShift:
         case OpRShift:
             run(e->left, SInt32Type);
-            run(e->right, UInt32Type);
+            run(e->right, SInt32Type);
             break;
 
         case OpURShift:
             run(e->left, UInt32Type);
-            run(e->right, UInt32Type);
+            run(e->right, SInt32Type);
             break;
 
         case OpGt: