dts/imx: rename uart labels to consistent with hw spec
authorRichard Zhao <richard.zhao@linaro.org>
Wed, 14 Dec 2011 01:26:45 +0000 (09:26 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Wed, 14 Dec 2011 13:25:44 +0000 (21:25 +0800)
UART1/UART2/... is more readable than UART0/UART1/... .
Remove redundant UART comments.

Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx51-babbage.dts
arch/arm/boot/dts/imx51.dtsi
arch/arm/boot/dts/imx53-ard.dts
arch/arm/boot/dts/imx53-evk.dts
arch/arm/boot/dts/imx53-qsb.dts
arch/arm/boot/dts/imx53-smd.dts
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/imx6q-sabreauto.dts
arch/arm/boot/dts/imx6q.dtsi

index ed09dc1..564cb8c 100644 (file)
@@ -40,7 +40,7 @@
                                        status = "okay";
                                };
 
-                               uart2: uart@7000c000 { /* UART3 */
+                               uart3: uart@7000c000 {
                                        fsl,uart-has-rtscts;
                                        status = "okay";
                                };
                                reg = <0x73fa8000 0x4000>;
                        };
 
-                       uart0: uart@73fbc000 {
+                       uart1: uart@73fbc000 {
                                fsl,uart-has-rtscts;
                                status = "okay";
                        };
 
-                       uart1: uart@73fc0000 {
+                       uart2: uart@73fc0000 {
                                status = "okay";
                        };
                };
index 57a790d..6663986 100644 (file)
@@ -14,9 +14,9 @@
 
 / {
        aliases {
-               serial0 = &uart0;
-               serial1 = &uart1;
-               serial2 = &uart2;
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
        };
 
        tzic: tz-interrupt-controller@e0000000 {
@@ -86,7 +86,7 @@
                                        status = "disabled";
                                };
 
-                               uart2: uart@7000c000 { /* UART3 */
+                               uart3: uart@7000c000 {
                                        compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                        reg = <0x7000c000 0x4000>;
                                        interrupts = <33>;
                                status = "disabled";
                        };
 
-                       uart0: uart@73fbc000 {
+                       uart1: uart@73fbc000 {
                                compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                reg = <0x73fbc000 0x4000>;
                                interrupts = <31>;
                                status = "disabled";
                        };
 
-                       uart1: uart@73fc0000 {
+                       uart2: uart@73fc0000 {
                                compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                reg = <0x73fc0000 0x4000>;
                                interrupts = <32>;
index 78c949e..2dccce4 100644 (file)
@@ -44,7 +44,7 @@
                                reg = <0x53fa8000 0x4000>;
                        };
 
-                       uart0: uart@53fbc000 { /* UART1 */
+                       uart1: uart@53fbc000 {
                                status = "okay";
                        };
                };
index 964743e..5bac4aa 100644 (file)
@@ -75,7 +75,7 @@
                                reg = <0x53fa8000 0x4000>;
                        };
 
-                       uart0: uart@53fbc000 { /* UART1 */
+                       uart1: uart@53fbc000 {
                                status = "okay";
                        };
                };
index cc43bde..5c57c86 100644 (file)
@@ -49,7 +49,7 @@
                                reg = <0x53fa8000 0x4000>;
                        };
 
-                       uart0: uart@53fbc000 { /* UART1 */
+                       uart1: uart@53fbc000 {
                                status = "okay";
                        };
                };
index 9e51bc3..c7ee86c 100644 (file)
@@ -39,7 +39,7 @@
                                        status = "okay";
                                };
 
-                               uart2: uart@5000c000 { /* UART3 */
+                               uart3: uart@5000c000 {
                                        fsl,uart-has-rtscts;
                                        status = "okay";
                                };
                                reg = <0x53fa8000 0x4000>;
                        };
 
-                       uart0: uart@53fbc000 { /* UART1 */
+                       uart1: uart@53fbc000 {
                                status = "okay";
                        };
 
-                       uart1: uart@53fc0000 { /* UART2 */
+                       uart2: uart@53fc0000 {
                                status = "okay";
                        };
                };
index 3b15cdc..5dd91b9 100644 (file)
 
 / {
        aliases {
-               serial0 = &uart0;
-               serial1 = &uart1;
-               serial2 = &uart2;
-               serial3 = &uart3;
-               serial4 = &uart4;
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
+               serial3 = &uart4;
+               serial4 = &uart5;
        };
 
        tzic: tz-interrupt-controller@0fffc000 {
@@ -88,7 +88,7 @@
                                        status = "disabled";
                                };
 
-                               uart2: uart@5000c000 { /* UART3 */
+                               uart3: uart@5000c000 {
                                        compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                        reg = <0x5000c000 0x4000>;
                                        interrupts = <33>;
                                status = "disabled";
                        };
 
-                       uart0: uart@53fbc000 { /* UART1 */
+                       uart1: uart@53fbc000 {
                                compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                reg = <0x53fbc000 0x4000>;
                                interrupts = <31>;
                                status = "disabled";
                        };
 
-                       uart1: uart@53fc0000 { /* UART2 */
+                       uart2: uart@53fc0000 {
                                compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                reg = <0x53fc0000 0x4000>;
                                interrupts = <32>;
                                status = "disabled";
                        };
 
-                       uart3: uart@53ff0000 { /* UART4 */
+                       uart4: uart@53ff0000 {
                                compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                reg = <0x53ff0000 0x4000>;
                                interrupts = <13>;
                        reg = <0x60000000 0x10000000>;
                        ranges;
 
-                       uart4: uart@63f90000 { /* UART5 */
+                       uart5: uart@63f90000 {
                                compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                reg = <0x63f90000 0x4000>;
                                interrupts = <86>;
index cd11ab0..eef6d64 100644 (file)
@@ -44,7 +44,7 @@
                                status = "okay";
                        };
 
-                       uart3: uart@021f0000 { /* UART4 */
+                       uart4: uart@021f0000 {
                                status = "okay";
                        };
                };
index 9d0bf4b..263e8f3 100644 (file)
 
 / {
        aliases {
-               serial0 = &uart0;
-               serial1 = &uart1;
-               serial2 = &uart2;
-               serial3 = &uart3;
-               serial4 = &uart4;
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
+               serial3 = &uart4;
+               serial4 = &uart5;
        };
 
        cpus {
                                        status = "disabled";
                                };
 
-                               uart0: uart@02020000 { /* UART1 */
+                               uart1: uart@02020000 {
                                        compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02020000 0x4000>;
                                        interrupts = <0 26 0x04>;
                                interrupts = <0 18 0x04>;
                        };
 
-                       uart1: uart@021e8000 { /* UART2 */
+                       uart2: uart@021e8000 {
                                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                reg = <0x021e8000 0x4000>;
                                interrupts = <0 27 0x04>;
                                status = "disabled";
                        };
 
-                       uart2: uart@021ec000 { /* UART3 */
+                       uart3: uart@021ec000 {
                                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                reg = <0x021ec000 0x4000>;
                                interrupts = <0 28 0x04>;
                                status = "disabled";
                        };
 
-                       uart3: uart@021f0000 { /* UART4 */
+                       uart4: uart@021f0000 {
                                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                reg = <0x021f0000 0x4000>;
                                interrupts = <0 29 0x04>;
                                status = "disabled";
                        };
 
-                       uart4: uart@021f4000 { /* UART5 */
+                       uart5: uart@021f4000 {
                                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                reg = <0x021f4000 0x4000>;
                                interrupts = <0 30 0x04>;