if (slc)
cache_policy |= ac_slc;
- LLVMValueRef voffset = LLVMBuildAdd(ctx->ac.builder, addr_voffset,
- LLVMConstInt(ctx->ac.i32, const_offset, 0), "");
- ac_build_buffer_store_dword(&ctx->ac, descriptor, store_data, NULL, voffset, addr_soffset,
- cache_policy);
+ unsigned writemask = nir_intrinsic_write_mask(instr);
+ while (writemask) {
+ int start, count;
+ u_bit_scan_consecutive_range(&writemask, &start, &count);
+
+ LLVMValueRef voffset = LLVMBuildAdd(
+ ctx->ac.builder, addr_voffset,
+ LLVMConstInt(ctx->ac.i32, const_offset + start * 4, 0), "");
+
+ LLVMValueRef data = extract_vector_range(&ctx->ac, store_data, start, count);
+ ac_build_buffer_store_dword(&ctx->ac, descriptor, data, NULL, voffset, addr_soffset,
+ cache_policy);
+ }
break;
}
case nir_intrinsic_has_input_vertex_amd: {