drm/amdgpu: force pa_sc_tile_steering_override to 0 for navy_flounder

pa_sc_tile_steering_override is only programmable for
gfx10.0/10.1/10.2, and navy_flounder has the same gfx10.3 IP
with sienna_cichlid.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index b289486..e2ada4e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4496,7 +4496,8 @@ static u32 gfx_v10_0_init_pa_sc_tile_steering_override(struct amdgpu_device *ade
 
        /* for ASICs that integrates GFX v10.3
         * pa_sc_tile_steering_override should be set to 0 */
-       if (adev->asic_type == CHIP_SIENNA_CICHLID)
+       if (adev->asic_type == CHIP_SIENNA_CICHLID ||
+           adev->asic_type == CHIP_NAVY_FLOUNDER)
                return 0;
 
        /* init num_sc */