Some CSI2 receivers support 8 data lanes.
So, this patch updates CSI2 maximum data lanes to be 8.
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
struct v4l2_async_notifier;
struct v4l2_async_subdev;
-#define V4L2_FWNODE_CSI2_MAX_DATA_LANES 4
+#define V4L2_FWNODE_CSI2_MAX_DATA_LANES 8
/**
* struct v4l2_fwnode_bus_mipi_csi2 - MIPI CSI-2 bus data structure