[RISCV] Use RISCV::RVVBitsPerBlock for RGK_ScalableVector in getRegisterBitWidth.
authorCraig Topper <craig.topper@sifive.com>
Tue, 17 Aug 2021 17:52:34 +0000 (10:52 -0700)
committerCraig Topper <craig.topper@sifive.com>
Tue, 17 Aug 2021 18:13:15 +0000 (11:13 -0700)
I might be wrong, but I think this is should be width of the known
min size we use for scalable vectors. It shouldn't scale with
minimum vlen.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D107945

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

index 95dacb1..7be85cf 100644 (file)
@@ -66,7 +66,7 @@ public:
           ST->hasStdExtV() ? ST->getMinRVVVectorSizeInBits() : 0);
     case TargetTransformInfo::RGK_ScalableVector:
       return TypeSize::getScalable(
-          ST->hasStdExtV() ? ST->getMinRVVVectorSizeInBits() : 0);
+          ST->hasStdExtV() ? RISCV::RVVBitsPerBlock : 0);
     }
 
     llvm_unreachable("Unsupported register kind");