arm64: dts: uniphier: add SD-ctrl node for LD11 SoC

The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as
MIO-ctrl (0x5b3e0000).  The SD-ctrl block on this SoC has just
one register for controlling RST_n pin of the eMMC device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 7c7511b..43b6583 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -273,6 +273,17 @@
                        reg = <0x59801000 0x400>;
                };
 
+               sdctrl@59810000 {
+                       compatible = "socionext,uniphier-ld11-sdctrl",
+                                    "simple-mfd", "syscon";
+                       reg = <0x59810000 0x400>;
+
+                       sd_rst: reset {
+                               compatible = "socionext,uniphier-ld11-sd-reset";
+                               #reset-cells = <1>;
+                       };
+               };
+
                perictrl@59820000 {
                        compatible = "socionext,uniphier-ld11-perictrl",
                                     "simple-mfd", "syscon";