drm/amdgpu: Add mode-2 reset in SMU v13.0.6
authorLijo Lazar <lijo.lazar@amd.com>
Thu, 9 Mar 2023 07:34:56 +0000 (13:04 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:55:12 +0000 (09:55 -0400)
Modifications to mode-2 reset flow for SMU v13.0.6 ASICs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

index 9fbfd08..082c1e9 100644 (file)
@@ -556,6 +556,15 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
                if (connected_to_cpu)
                        return AMD_RESET_METHOD_MODE2;
                break;
+       case IP_VERSION(13, 0, 6):
+               /* Use gpu_recovery param to target a reset method.
+                * Enable triggering of GPU reset only if specified
+                * by module parameter.
+                */
+               if (amdgpu_gpu_recovery == 4 || amdgpu_gpu_recovery == 5)
+                       return AMD_RESET_METHOD_MODE2;
+               else
+                       return AMD_RESET_METHOD_NONE;
        default:
                break;
        }
index 6dcafd0..4b808c0 100644 (file)
@@ -2024,27 +2024,27 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table
 
 static int smu_v13_0_6_mode2_reset(struct smu_context *smu)
 {
-       u32 smu_version;
        int ret = 0, index;
        struct amdgpu_device *adev = smu->adev;
        int timeout = 10;
 
-       smu_cmn_get_smc_version(smu, NULL, &smu_version);
-
        index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
                                               SMU_MSG_GfxDeviceDriverReset);
 
        mutex_lock(&smu->message_lock);
+
        ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index,
                                               SMU_RESET_MODE_2);
+
        /* This is similar to FLR, wait till max FLR timeout */
        msleep(100);
+
        dev_dbg(smu->adev->dev, "restore config space...\n");
        /* Restore the config space saved during init */
        amdgpu_device_load_pci_state(adev->pdev);
 
        dev_dbg(smu->adev->dev, "wait for reset ack\n");
-       while (ret == -ETIME && timeout) {
+       do {
                ret = smu_cmn_wait_for_response(smu);
                /* Wait a bit more time for getting ACK */
                if (ret == -ETIME) {
@@ -2053,16 +2053,14 @@ static int smu_v13_0_6_mode2_reset(struct smu_context *smu)
                        continue;
                }
 
-               if (ret != 1) {
+               if (ret) {
                        dev_err(adev->dev,
-                               "failed to send mode2 message \tparam: 0x%08x response %#x\n",
+                               "failed to send mode2 message \tparam: 0x%08x error code %d\n",
                                SMU_RESET_MODE_2, ret);
                        goto out;
                }
-       }
+       } while (ret == -ETIME && timeout);
 
-       if (ret == 1)
-               ret = 0;
 out:
        mutex_unlock(&smu->message_lock);