case TGSI_OPCODE_IF:
// MOVRC0 R31 (TR0.xyzw), R<src>:
// IF (NE.xxxx) ELSE <else> END <end>
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
nv40_fp_if(fpc, src[0]);
break;
case TGSI_OPCODE_ELSE:
{
uint32_t *hw;
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
assert(util_dynarray_contains(&fpc->if_stack, unsigned));
hw = &fpc->fp->insn[util_dynarray_top(&fpc->if_stack, unsigned)];
case TGSI_OPCODE_ENDIF:
{
uint32_t *hw;
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
assert(util_dynarray_contains(&fpc->if_stack, unsigned));
hw = &fpc->fp->insn[util_dynarray_pop(&fpc->if_stack, unsigned)];
break;
case TGSI_OPCODE_CAL:
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
nv40_fp_cal(fpc, finst->Label.Label);
break;
case TGSI_OPCODE_RET:
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
nv40_fp_ret(fpc);
break;
case TGSI_OPCODE_BGNLOOP:
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
/* TODO: we should support using two nested REPs to allow a > 255 iteration count */
nv40_fp_rep(fpc, 255, finst->Label.Label);
break;
case TGSI_OPCODE_BRK:
- if(!nvfx->use_nv4x)
+ if(!nvfx->is_nv4x)
goto nv3x_cflow;
nv40_fp_brk(fpc);
break;
nvfx_fragprog_assign_generic(struct nv30_context *nvfx, struct nvfx_fpc *fpc,
const struct tgsi_full_declaration *fdec)
{
- unsigned num_texcoords = nvfx->use_nv4x ? 10 : 8;
+ unsigned num_texcoords = nvfx->is_nv4x ? 10 : 8;
unsigned idx = fdec->Range.First;
unsigned hw;
case 2: hw = 3; break;
case 3: hw = 4; break;
}
- if(hw > ((nvfx->use_nv4x) ? 4 : 2)) {
+ if(hw > ((nvfx->is_nv4x) ? 4 : 2)) {
NOUVEAU_ERR("bad rcol index\n");
return FALSE;
}
if (!fpc)
goto out_err;
- fpc->max_temps = nvfx->use_nv4x ? 48 : 32;
+ fpc->max_temps = nvfx->is_nv4x ? 48 : 32;
fpc->fp = fp;
fpc->num_regs = 2;
memset(fp->texcoord, 0xff, sizeof(fp->texcoord));
hw[0] |= NVFX_VP(INST_COND_UPDATE_ENABLE);
if(insn.sat) {
- assert(nv30->use_nv4x);
- if(nv30->use_nv4x)
+ assert(nv30->is_nv4x);
+ if(nv30->is_nv4x)
hw[0] |= NV40_VP_INST_SATURATE;
}
mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
if(finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE) {
assert(finst->Instruction.Opcode != TGSI_OPCODE_ARL);
- if (nv30->use_nv4x)
+ if (nv30->is_nv4x)
sat = TRUE;
else
if(dst.type != NVFXSR_TEMP)
return FALSE;
}
- if(finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE && !nv30->use_nv4x) {
+ if(finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE && !nv30->is_nv4x) {
if (!vpc->r_0_1.type)
vpc->r_0_1 = constant(vpc, -1, 0, 1, 0, 0);
nvfx_vp_emit(vpc, arith(0, VEC, MAX, dst, mask, nvfx_src(dst), swz(nvfx_src(vpc->r_0_1), X, X, X, X), none));