ARM: imx6q: clk: Add the video_27m clock
authorLiu Ying <Ying.Liu@freescale.com>
Thu, 12 Feb 2015 06:01:26 +0000 (14:01 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 2 Mar 2015 12:52:03 +0000 (20:52 +0800)
This patch supports the video_27m clock which is a fixed factor
clock of the pll3_pfd1_540m clock.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/clk-imx6q.c
include/dt-bindings/clock/imx6qdl-clock.h

index d04a430..8335bfc 100644 (file)
@@ -246,6 +246,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        clk[IMX6QDL_CLK_PLL3_60M]  = imx_clk_fixed_factor("pll3_60m",  "pll3_usb_otg",   1, 8);
        clk[IMX6QDL_CLK_TWD]       = imx_clk_fixed_factor("twd",       "arm",            1, 2);
        clk[IMX6QDL_CLK_GPT_3M]    = imx_clk_fixed_factor("gpt_3m",    "osc",            1, 8);
+       clk[IMX6QDL_CLK_VIDEO_27M] = imx_clk_fixed_factor("video_27m", "pll3_pfd1_540m", 1, 20);
        if (cpu_is_imx6dl()) {
                clk[IMX6QDL_CLK_GPU2D_AXI] = imx_clk_fixed_factor("gpu2d_axi", "mmdc_ch0_axi_podf", 1, 1);
                clk[IMX6QDL_CLK_GPU3D_AXI] = imx_clk_fixed_factor("gpu3d_axi", "mmdc_ch0_axi_podf", 1, 1);
index b690cdb..25625bf 100644 (file)
 #define IMX6QDL_PLL6_BYPASS                    235
 #define IMX6QDL_PLL7_BYPASS                    236
 #define IMX6QDL_CLK_GPT_3M                     237
-#define IMX6QDL_CLK_END                                238
+#define IMX6QDL_CLK_VIDEO_27M                  238
+#define IMX6QDL_CLK_END                                239
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */