arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 19 Jul 2020 17:32:12 +0000 (19:32 +0200)
committerKevin Hilman <khilman@baylibre.com>
Tue, 21 Jul 2020 21:12:38 +0000 (14:12 -0700)
Add the OPP table for the Mali-T820 GPU and drop the hardcoded initial
clock configuration. This enables GPU DVFS and thus saves power when the
GPU is not in use while still being able switch to a higher clock on
demand.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200719173213.639540-3-martin.blumenstingl@googlemail.com
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi

index 40e3e12..fe41451 100644 (file)
                        #cooling-cells = <2>;
                };
        };
+
+       gpu_opp_table: opp-table {
+               compatible = "operating-points-v2";
+
+               opp-125000000 {
+                       opp-hz = /bits/ 64 <125000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp-250000000 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp-285714285 {
+                       opp-hz = /bits/ 64 <285714285>;
+                       opp-microvolt = <950000>;
+               };
+               opp-400000000 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp-666666666 {
+                       opp-hz = /bits/ 64 <666666666>;
+                       opp-microvolt = <950000>;
+               };
+       };
 };
 
 &apb {
                interrupt-names = "job", "mmu", "gpu";
                clocks = <&clkc CLKID_MALI>;
                resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
-
-               /*
-                * Mali clocking is provided by two identical clock paths
-                * MALI_0 and MALI_1 muxed to a single clock by a glitch
-                * free mux to safely change frequency while running.
-                */
-               assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
-                                 <&clkc CLKID_MALI_0>,
-                                 <&clkc CLKID_MALI>; /* Glitch free mux */
-               assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
-                                        <0>, /* Do Nothing */
-                                        <&clkc CLKID_MALI_0>;
-               assigned-clock-rates = <0>, /* Do Nothing */
-                                      <666666666>,
-                                      <0>; /* Do Nothing */
+               operating-points-v2 = <&gpu_opp_table>;
        };
 };