dt-bingings: Adjust the line feed to be more intuitive
authorSaminGuo <samin.guo@starfivetech.com>
Fri, 19 Nov 2021 05:33:34 +0000 (13:33 +0800)
committerSaminGuo <samin.guo@starfivetech.com>
Fri, 19 Nov 2021 05:33:34 +0000 (13:33 +0800)
Signed-off-by: SaminGuo <samin.guo@starfivetech.com>
arch/riscv/boot/dts/starfive/starfive_jh7110.dts

index add76cf..f631bbd 100644 (file)
                        #interrupt-cells = <1>;
                        compatible = "riscv,clint0";
                        /*interrupts-extended = <&cpu0intctrl 3 &cpu0intctrl 7 &cpu1intctrl 3 &cpu1intctrl 7 >;*/
-                       interrupts-extended = <&cpu0intctrl 3 &cpu0intctrl 7 &cpu1intctrl 3 &cpu1intctrl 7 &cpu2intctrl 3 &cpu2intctrl 7 &cpu3intctrl 3 &cpu3intctrl 7 &cpu4intctrl 3 &cpu4intctrl 7>;
+                       interrupts-extended = <&cpu0intctrl 3 &cpu0intctrl 7
+                                               &cpu1intctrl 3 &cpu1intctrl 7
+                                               &cpu2intctrl 3 &cpu2intctrl 7
+                                               &cpu3intctrl 3 &cpu3intctrl 7
+                                               &cpu4intctrl 3 &cpu4intctrl 7>;
                        reg = <0x0 0x2000000 0x0 0x10000>;
                        reg-names = "control";
                };
                        compatible = "riscv,plic0";
                        interrupt-controller;
                        /*interrupts-extended = <&cpu0intctrl 11 &cpu0intctrl 9 &cpu1intctrl 11 &cpu1intctrl 9 >;*/
-                       interrupts-extended = <&cpu0intctrl 11 &cpu1intctrl 11 &cpu1intctrl 9 &cpu2intctrl 11 &cpu2intctrl 9 &cpu3intctrl 11 &cpu3intctrl 9 &cpu4intctrl 11 &cpu4intctrl 9>;
+                       interrupts-extended = <&cpu0intctrl 11
+                                               &cpu1intctrl 11 &cpu1intctrl 9
+                                               &cpu2intctrl 11 &cpu2intctrl 9
+                                               &cpu3intctrl 11 &cpu3intctrl 9
+                                               &cpu4intctrl 11 &cpu4intctrl 9>;
                        reg = <0x0 0xc000000 0x0 0x4000000>;
                        reg-names = "control";
                        riscv,max-priority = <7>;