{
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
- omap_clkm_reset(mpu);
omap_inth_reset(mpu->ih[0]);
omap_inth_reset(mpu->ih[1]);
omap_dma_reset(mpu->dma);
omap_mcbsp_reset(mpu->mcbsp3);
omap_lpg_reset(mpu->led[0]);
omap_lpg_reset(mpu->led[1]);
+ omap_clkm_reset(mpu);
cpu_reset(mpu->env);
}
}
/* We do not model the chip select pin, so allow the board to select
- whether card should be in SSI ot MMC/SD mode. It is also up to the
+ whether card should be in SSI or MMC/SD mode. It is also up to the
board to ensure that ssi transfers only occur when the chip select
is asserted. */
SDState *sd_init(BlockDriverState *bs, int is_spi)
#define Y_TRANSFORM(value) \
((150 + ((int) (value) * (3037 - 150) / 32768)) << 4)
#define Z1_TRANSFORM(s) \
- ((400 - (s)->x + ((s)->pressure << 9)) << 4)
+ ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
#define Z2_TRANSFORM(s) \
- ((4000 + (s)->y - ((s)->pressure << 10)) << 4)
+ ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
+
#define BAT1_VAL 0x8660
#define BAT2_VAL 0x0000
#define AUX1_VAL 0x35c0
case 0x05: /* BAT1 */
s->dav &= 0xffbf;
- return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision);
+ return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
+ (s->noise & 6);
case 0x06: /* BAT2 */
s->dav &= 0xffdf;
case 0x09: /* TEMP1 */
s->dav &= 0xfffb;
- return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision);
+ return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
+ (s->noise & 5);
case 0x0a: /* TEMP2 */
s->dav &= 0xfffd;
- return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision);
+ return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
+ (s->noise & 3);
case 0x0b: /* DAC */
s->dav &= 0xfffe;