ARM: DT: STiH407: Add NAND flash controller pin configuration
authorPeter Griffin <peter.griffin@linaro.org>
Mon, 28 Sep 2015 12:37:00 +0000 (14:37 +0200)
committerMaxime Coquelin <maxime.coquelin@st.com>
Wed, 30 Sep 2015 08:04:30 +0000 (10:04 +0200)
This patch adds NAND flash support controller pin configuration
for STiH407 family silicon.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
arch/arm/boot/dts/stih407-pinctrl.dtsi

index b7a405f..d281f9c 100644 (file)
                                        };
                                };
                        };
+
+                       nand {
+                               pinctrl_nand: nand {
+                                       st,pins {
+                                               nand_cs1 = <&pio40 6 ALT3 OUT>;
+                                               nand_cs0 = <&pio40 7 ALT3 OUT>;
+                                               nand_d0 = <&pio41 0 ALT3 BIDIR>;
+                                               nand_d1 = <&pio41 1 ALT3 BIDIR>;
+                                               nand_d2 = <&pio41 2 ALT3 BIDIR>;
+                                               nand_d3 = <&pio41 3 ALT3 BIDIR>;
+                                               nand_d4 = <&pio41 4 ALT3 BIDIR>;
+                                               nand_d5 = <&pio41 5 ALT3 BIDIR>;
+                                               nand_d6 = <&pio41 6 ALT3 BIDIR>;
+                                               nand_d7 = <&pio41 7 ALT3 BIDIR>;
+                                               nand_we = <&pio42 0 ALT3 OUT>;
+                                               nand_dqs = <&pio42 1 ALT3 OUT>;
+                                               nand_ale = <&pio42 2 ALT3 OUT>;
+                                               nand_cle = <&pio42 3 ALT3 OUT>;
+                                               nand_rnb = <&pio42 4 ALT3 IN>;
+                                               nand_oe = <&pio42 5 ALT3 OUT>;
+                                       };
+                               };
+                       };
                };
        };
 };