arm64: factor out GPR numbering helpers

In <asm/sysreg.h> we have macros to convert the names of general purpose
registers (GPRs) into integer constants, which we use to manually build
the encoding for `MRS` and `MSR` instructions where we can't rely on the
assembler to do so for us.

In subsequent patches we'll need to map the same GPR names to integer
constants so that we can use this to build metadata for exception
fixups.

So that the we can use the mappings elsewhere, factor out the
definitions into a new <asm/gpr-num.h> header, renaming the definitions
to align with this "GPR num" naming for clarity.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20211019160219.5202-6-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/gpr-num.h b/arch/arm64/include/asm/gpr-num.h
new file mode 100644 (file)
index 0000000..f936aa3
--- /dev/null
+++ b/arch/arm64/include/asm/gpr-num.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_GPR_NUM_H
+#define __ASM_GPR_NUM_H
+
+#ifdef __ASSEMBLY__
+
+       .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
+       .equ    .L__gpr_num_x\num, \num
+       .endr
+       .equ    .L__gpr_num_xzr, 31
+
+#else /* __ASSEMBLY__ */
+
+#define __DEFINE_ASM_GPR_NUMS                                  \
+"      .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \
+"      .equ    .L__gpr_num_x\\num, \\num\n"                    \
+"      .endr\n"                                                \
+"      .equ    .L__gpr_num_xzr, 31\n"
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_GPR_NUM_H */

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index b268082..58f6e66 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -13,6 +13,8 @@
 #include <linux/stringify.h>
 #include <linux/kasan-tags.h>
 
+#include <asm/gpr-num.h>
+
 /*
  * ARMv8 ARM reserves the following encoding for system registers:
  * (Ref: ARMv8 ARM, Section: "System instruction class encoding overview",
@@ -1192,17 +1194,12 @@
 
 #ifdef __ASSEMBLY__
 
-       .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
-       .equ    .L__reg_num_x\num, \num
-       .endr
-       .equ    .L__reg_num_xzr, 31
-
        .macro  mrs_s, rt, sreg
-        __emit_inst(0xd5200000|(\sreg)|(.L__reg_num_\rt))
+        __emit_inst(0xd5200000|(\sreg)|(.L__gpr_num_\rt))
        .endm
 
        .macro  msr_s, sreg, rt
-       __emit_inst(0xd5000000|(\sreg)|(.L__reg_num_\rt))
+       __emit_inst(0xd5000000|(\sreg)|(.L__gpr_num_\rt))
        .endm
 
 #else
@@ -1211,22 +1208,16 @@
 #include <linux/types.h>
 #include <asm/alternative.h>
 
-#define __DEFINE_MRS_MSR_S_REGNUM                              \
-"      .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \
-"      .equ    .L__reg_num_x\\num, \\num\n"                    \
-"      .endr\n"                                                \
-"      .equ    .L__reg_num_xzr, 31\n"
-
 #define DEFINE_MRS_S                                           \
-       __DEFINE_MRS_MSR_S_REGNUM                               \
+       __DEFINE_ASM_GPR_NUMS                                   \
 "      .macro  mrs_s, rt, sreg\n"                              \
-       __emit_inst(0xd5200000|(\\sreg)|(.L__reg_num_\\rt))     \
+       __emit_inst(0xd5200000|(\\sreg)|(.L__gpr_num_\\rt))     \
 "      .endm\n"
 
 #define DEFINE_MSR_S                                           \
-       __DEFINE_MRS_MSR_S_REGNUM                               \
+       __DEFINE_ASM_GPR_NUMS                                   \
 "      .macro  msr_s, sreg, rt\n"                              \
-       __emit_inst(0xd5000000|(\\sreg)|(.L__reg_num_\\rt))     \
+       __emit_inst(0xd5000000|(\\sreg)|(.L__gpr_num_\\rt))     \
 "      .endm\n"
 
 #define UNDEFINE_MRS_S                                         \