drm/i915/dg2: Add support for DC5 state

With the latest DMC in place, enabling DC5 on DG2.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728183641.55692-1-anusha.srivatsa@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 13aaa3247a5a8b8fc1c033a536ad7c5bc130bd9a..3f84af6beff31d7a32908cf3b73a0b2e8fb152df 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -908,7 +908,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
                return 0;
 
        if (IS_DG2(dev_priv))
-               max_dc = 0;
+               max_dc = 1;
        else if (IS_DG1(dev_priv))
                max_dc = 3;
        else if (DISPLAY_VER(dev_priv) >= 12)