spi: imx: remove ERR009165 workaround on i.mx6ul
authorRobin Gong <yibin.gong@nxp.com>
Wed, 14 Jul 2021 10:20:48 +0000 (18:20 +0800)
committerShawn Guo <shawnguo@kernel.org>
Fri, 23 Jul 2021 03:19:22 +0000 (11:19 +0800)
ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and
i.mx8m/8mm still need this errata. Please refer to nxp official
errata document from https://www.nxp.com/ .

For removing workaround on those chips. Add new i.mx6ul type.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/spi/spi-imx.c

index 1f43ad6..2096969 100644 (file)
@@ -77,6 +77,11 @@ struct spi_imx_devtype_data {
        bool has_slavemode;
        unsigned int fifo_size;
        bool dynamic_burst;
+       /*
+        * ERR009165 fixed or not:
+        * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
+        */
+       bool tx_glitch_fixed;
        enum spi_imx_devtype devtype;
 };
 
@@ -591,8 +596,14 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
        ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk);
        spi_imx->spi_bus_clk = clk;
 
-       /* ERR009165: work in XHC mode as PIO */
-       ctrl &= ~MX51_ECSPI_CTRL_SMC;
+       /*
+        * ERR009165: work in XHC mode instead of SMC as PIO on the chips
+        * before i.mx6ul.
+        */
+       if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed)
+               ctrl |= MX51_ECSPI_CTRL_SMC;
+       else
+               ctrl &= ~MX51_ECSPI_CTRL_SMC;
 
        writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
 
@@ -618,12 +629,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
 
 static void mx51_setup_wml(struct spi_imx_data *spi_imx)
 {
+       u32 tx_wml = 0;
+
+       if (spi_imx->devtype_data->tx_glitch_fixed)
+               tx_wml = spi_imx->wml;
        /*
         * Configure the DMA register: setup the watermark
         * and enable DMA request.
         */
        writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
-               MX51_ECSPI_DMA_TX_WML(0) |
+               MX51_ECSPI_DMA_TX_WML(tx_wml) |
                MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
                MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
                MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
@@ -1014,6 +1029,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = {
        .devtype = IMX53_ECSPI,
 };
 
+static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = {
+       .intctrl = mx51_ecspi_intctrl,
+       .prepare_message = mx51_ecspi_prepare_message,
+       .prepare_transfer = mx51_ecspi_prepare_transfer,
+       .trigger = mx51_ecspi_trigger,
+       .rx_available = mx51_ecspi_rx_available,
+       .reset = mx51_ecspi_reset,
+       .setup_wml = mx51_setup_wml,
+       .fifo_size = 64,
+       .has_dmamode = true,
+       .dynamic_burst = true,
+       .has_slavemode = true,
+       .tx_glitch_fixed = true,
+       .disable = mx51_ecspi_disable,
+       .devtype = IMX51_ECSPI,
+};
+
 static const struct of_device_id spi_imx_dt_ids[] = {
        { .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, },
        { .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, },
@@ -1022,6 +1054,7 @@ static const struct of_device_id spi_imx_dt_ids[] = {
        { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
        { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
        { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, },
+       { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, },
        { /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, spi_imx_dt_ids);