arm: dts: mt7623: add related clock properties to cpu[1-3] nodes

Complement the missing clock properties cpu[1-3] should depend on.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-pm@vger.kernel.org
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index b750da5..116775e 100644 (file)
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -96,6 +96,9 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a7";
                        reg = <0x1>;
+                       clocks = <&infracfg CLK_INFRA_CPUSEL>,
+                                <&apmixedsys CLK_APMIXED_MAINPLL>;
+                       clock-names = "cpu", "intermediate";
                        operating-points-v2 = <&cpu_opp_table>;
                        clock-frequency = <1300000000>;
                };
@@ -104,6 +107,9 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a7";
                        reg = <0x2>;
+                       clocks = <&infracfg CLK_INFRA_CPUSEL>,
+                                <&apmixedsys CLK_APMIXED_MAINPLL>;
+                       clock-names = "cpu", "intermediate";
                        operating-points-v2 = <&cpu_opp_table>;
                        clock-frequency = <1300000000>;
                };
@@ -112,6 +118,9 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a7";
                        reg = <0x3>;
+                       clocks = <&infracfg CLK_INFRA_CPUSEL>,
+                                <&apmixedsys CLK_APMIXED_MAINPLL>;
+                       clock-names = "cpu", "intermediate";
                        operating-points-v2 = <&cpu_opp_table>;
                        clock-frequency = <1300000000>;
                };