target-ppc: convert external load/store instructions to TCG

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5831 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-ppc/op.c b/target-ppc/op.c
index 03ba0d7695191cbf13470fc14ba7d197cca7bd2d..00b9903ad7c987399ba8328cde7e50358ee1e9fb 100644 (file)
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -257,22 +257,6 @@ void OPPROTO op_srli_T1 (void)
     RETURN();
 }
 
-/* Load and store */
-#define MEMSUFFIX _raw
-#include "op_helper.h"
-#include "op_mem.h"
-#if !defined(CONFIG_USER_ONLY)
-#define MEMSUFFIX _user
-#include "op_helper.h"
-#include "op_mem.h"
-#define MEMSUFFIX _kernel
-#include "op_helper.h"
-#include "op_mem.h"
-#define MEMSUFFIX _hypv
-#include "op_helper.h"
-#include "op_mem.h"
-#endif
-
 /* Return from interrupt */
 #if !defined(CONFIG_USER_ONLY)
 void OPPROTO op_rfi (void)

diff --git a/target-ppc/op_mem.h b/target-ppc/op_mem.h
deleted file mode 100644 (file)
index 1022fc3..0000000
--- a/target-ppc/op_mem.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- *  PowerPC emulation micro-operations for qemu.
- *
- *  Copyright (c) 2003-2007 Jocelyn Mayer
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include "op_mem_access.h"
-
-/* External access */
-void OPPROTO glue(op_eciwx, MEMSUFFIX) (void)
-{
-    T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void)
-{
-    T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
-    RETURN();
-}
-#endif
-
-void OPPROTO glue(op_ecowx, MEMSUFFIX) (void)
-{
-    glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void)
-{
-    glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
-    RETURN();
-}
-#endif
-
-void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void)
-{
-    T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void)
-{
-    T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
-    RETURN();
-}
-#endif
-
-void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void)
-{
-    glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void)
-{
-    glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
-    RETURN();
-}
-#endif
-
-#undef MEMSUFFIX

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 1c3986e88c94ca13143dddc39f41e6eb97d5824d..3f39431a10e9794da0e4b386db7e807b89385151 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2490,37 +2490,6 @@ static always_inline void gen_check_align (DisasContext *ctx, TCGv EA, int mask)
     tcg_temp_free(t0);
 }
 
-#if defined(TARGET_PPC64)
-#define _GEN_MEM_FUNCS(name, mode)                                            \
-    &gen_op_##name##_##mode,                                                  \
-    &gen_op_##name##_le_##mode,                                               \
-    &gen_op_##name##_64_##mode,                                               \
-    &gen_op_##name##_le_64_##mode
-#else
-#define _GEN_MEM_FUNCS(name, mode)                                            \
-    &gen_op_##name##_##mode,                                                  \
-    &gen_op_##name##_le_##mode
-#endif
-#if defined(CONFIG_USER_ONLY)
-#if defined(TARGET_PPC64)
-#define NB_MEM_FUNCS 4
-#else
-#define NB_MEM_FUNCS 2
-#endif
-#define GEN_MEM_FUNCS(name)                                                   \
-    _GEN_MEM_FUNCS(name, raw)
-#else
-#if defined(TARGET_PPC64)
-#define NB_MEM_FUNCS 12
-#else
-#define NB_MEM_FUNCS 6
-#endif
-#define GEN_MEM_FUNCS(name)                                                   \
-    _GEN_MEM_FUNCS(name, user),                                               \
-    _GEN_MEM_FUNCS(name, kernel),                                             \
-    _GEN_MEM_FUNCS(name, hypv)
-#endif
-
 /***                             Integer load                              ***/
 #if defined(TARGET_PPC64)
 #define GEN_QEMU_LD_PPC64(width)                                                 \
@@ -4427,32 +4396,28 @@ GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI)
 
 /***                              External control                         ***/
 /* Optional: */
-#define op_eciwx() (*gen_op_eciwx[ctx->mem_idx])()
-#define op_ecowx() (*gen_op_ecowx[ctx->mem_idx])()
-static GenOpFunc *gen_op_eciwx[NB_MEM_FUNCS] = {
-    GEN_MEM_FUNCS(eciwx),
-};
-static GenOpFunc *gen_op_ecowx[NB_MEM_FUNCS] = {
-    GEN_MEM_FUNCS(ecowx),
-};
-
 /* eciwx */
 GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN)
 {
-    /* Should check EAR[E] & alignment ! */
+    /* Should check EAR[E] ! */
+    TCGv t0 = tcg_temp_new();
     gen_set_access_type(ACCESS_RES);
-    gen_addr_reg_index(cpu_T[0], ctx);
-    op_eciwx();
-    tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]);
+    gen_addr_reg_index(t0, ctx);
+    gen_check_align(ctx, t0, 0x03);
+    gen_qemu_ld32u(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx);
+    tcg_temp_free(t0);
 }
 
 /* ecowx */
 GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN)
 {
-    /* Should check EAR[E] & alignment ! */
-    gen_addr_reg_index(cpu_T[0], ctx);
-    tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);
-    op_ecowx();
+    /* Should check EAR[E] ! */
+    TCGv t0 = tcg_temp_new();
+    gen_set_access_type(ACCESS_RES);
+    gen_addr_reg_index(t0, ctx);
+    gen_check_align(ctx, t0, 0x03);
+    gen_qemu_st32(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx);
+    tcg_temp_free(t0);
 }
 
 /* PowerPC 601 specific instructions */