drm/etnaviv: add handle for GPUs with only SECURITY_AHB flag
authorIcenowy Zheng <uwu@icenowy.me>
Fri, 1 Dec 2023 05:32:10 +0000 (13:32 +0800)
committerJaehoon Chung <jh80.chung@samsung.com>
Wed, 13 Mar 2024 06:58:56 +0000 (15:58 +0900)
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
(cherry picked from commit 9ba56a64a89bd22d1a41711d0028505d6d53cf12)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/gpu/drm/etnaviv/etnaviv_gpu.c

index 65ee5b9bfb5e80fea531caf012eef29feb2798ab..36799f59ec4e287d8a529c65560173e4ba120fc5 100644 (file)
@@ -523,7 +523,7 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
                control |= VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU;
                gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control);
 
-               if (gpu->sec_mode == ETNA_SEC_KERNEL) {
+               if (gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) {
                        gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL,
                                  VIVS_MMUv2_AHB_CONTROL_RESET);
                } else {
@@ -748,7 +748,7 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
                gpu_write(gpu, VIVS_MC_BUS_CONFIG, bus_config);
        }
 
-       if (gpu->sec_mode == ETNA_SEC_KERNEL) {
+       if (gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) {
                u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL);
                val |= VIVS_MMUv2_AHB_CONTROL_NONSEC_ACCESS;
                gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL, val);
@@ -794,7 +794,7 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
         * On cores with security features supported, we claim control over the
         * security states.
         */
-       if ((gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) &&
+       if ((gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) ||
            (gpu->identity.minor_features10 & chipMinorFeatures10_SECURITY_AHB))
                gpu->sec_mode = ETNA_SEC_KERNEL;