[AMDGPU] Add test coverage to ensure first regallocfast only allocates SGPR
authorJeffrey Byrnes <Jeffrey.Byrnes@amd.com>
Thu, 6 Oct 2022 21:29:04 +0000 (14:29 -0700)
committerJeffrey Byrnes <Jeffrey.Byrnes@amd.com>
Thu, 6 Oct 2022 21:31:51 +0000 (14:31 -0700)
Register allocation is split into two passes, and the expected behavior is that the first pass only should only work on virtual SGPRs. Whereas the second pass works on virtual VGPRs. This adds a test case which breaks if the first pass allocates VGPRs.

Differential Revision: https://reviews.llvm.org/D135331

llvm/test/CodeGen/AMDGPU/fastregalloc-sgpr-only.mir [new file with mode: 0644]

diff --git a/llvm/test/CodeGen/AMDGPU/fastregalloc-sgpr-only.mir b/llvm/test/CodeGen/AMDGPU/fastregalloc-sgpr-only.mir
new file mode 100644 (file)
index 0000000..c57919d
--- /dev/null
@@ -0,0 +1,32 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=regallocfast,0 --stop-after=regallocfast,0 -o - %s | FileCheck -check-prefix=GCN %s
+
+---
+name: copy_vgpr_allocation
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1, $vgpr4, $vgpr5
+    ; GCN-LABEL: name: copy_vgpr_allocation
+    ; GCN: liveins: $vgpr0, $vgpr1, $vgpr4, $vgpr5
+    ; GCN-NEXT: {{  $}}
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY killed $vgpr0_vgpr1
+    ; GCN-NEXT: FLAT_STORE_DWORDX2 killed $vgpr4_vgpr5, [[COPY]], 0, 0, implicit $exec, implicit $flat_scr
+    %14:vreg_64 = COPY $vgpr0_vgpr1
+    FLAT_STORE_DWORDX2 $vgpr4_vgpr5, %14:vreg_64, 0, 0, implicit $exec, implicit $flat_scr
+...
+
+
+---
+name: copy_sgpr_allocation
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $sgpr0, $sgpr1, $sgpr4
+    ; GCN-LABEL: name: copy_sgpr_allocation
+    ; GCN: liveins: $sgpr0, $sgpr1, $sgpr4
+    ; GCN-NEXT: {{  $}}
+    ; GCN-NEXT: S_STORE_DWORD_SGPR killed $sgpr4, killed renamable $sgpr0_sgpr1, undef $m0, 0
+    %14:sreg_64 = COPY $sgpr0_sgpr1
+    S_STORE_DWORD_SGPR $sgpr4, %14:sreg_64, undef $m0, 0
+...